| Table of Contents | ||
|---|---|---|
|
...
| Show advanced configuration | When selected, the user can configure advanced features: | |
|---|---|---|
| Time step factor | Denotes a multiplier for the board's speed in relation to the model's timestep. | |
| Enable FPGA register logger | For advanced debugging purposes, the driver will start a tool that will log all the FPGA register accesses during the initialization and the reset of the model. The logs will be saved in files named with the prefix "register_trace*". Those files are retrieved on the host PC after the reset of the model. | |
| Automatic bitstream reprogramming | If selected, bitstream programming is triggered automatically at the model load. The bitstreams should be placed at the model path and must have the name given in the configuration file used. If the bitstream currently programmed in the board is found to be the same as the one about to be programmed, then the bitstream is reloaded into the FPGA. The field is not available if the bitstream file is not Found. | |
| Bitstream file name | A static field showing the bitstream found based on the selected bitstream configuration file. | |
| Force | This option flashes the board even if it is already programmed with the same bitstream. | |
| Disable strict hardware mismatch validation | If selected, the use of multiple I/O card types based on general compatibility rules is activated instead of exact hardware ID values. | |
| Enable FPGA Scope | If selected, the FPGA Scope will be available when the model is executed. The option is visible only if the feature is available in the selected bitstream configuration file. | |
| Enable virtual mode | In virtual mode, the model can be executed even if this I/O interface is not compatible with the hardware configuration of the system. The connections between the model and the I/O interface will be done during the initialization, but the I/O interface will not do anything. The virtual mode can be used to troubleshoot problems on a system without having the required hardware, or to prepare a model with different I/O interfaces even if the final hardware platform is not available. | |
...
| Chassis and FPGA board | Supported |
|---|---|
| OP4500 with an MMPK7 module | No longer supported. |
| OP4510 with a TE0741 module | Yes |
| OP4512 with a TE0741 module | |
| OP4520 I/O expansion box with a TE0741 module | |
| OP4610 with a TE0741 module | |
| OP5600 with an OP5142 board | |
| OP5600 with an OP5143 board | |
| OP5600 with an ML605 board | No |
| OP5607 I/O expansion box with a VC707 board | Yes |
| OP5707 with a VC707 board | |
| OP7020 I/O expansion box with a VC707 board | |
| OP7160/OP7161 | No |
| OP7170 | Yes |
| OP5143 standalone PCIe card | Yes |
| OP4810 | Yes |
| OP4815 | Yes |
Limitations of the Multi-System Expansion link feature
...
| Chassis and FPGA board | Central | Remote |
|---|---|---|
| OP4500 with an MMPK7 module | No | No |
| OP4510 with a TE0741 module | Yes | Yes |
| OP4512 with a TE0741 module | Yes | |
| OP4520 I/O expansion box with a TE0741 module | Yes, if connected via PCIe to a simulator | |
| OP4610 with a TE0741 module | Yes | |
| OP5600 with an OP5142 board | No | No |
| OP5650 with an OP5143 board | Yes | Yes |
| OP5600 with an ML605 board | No | No |
| OP5607 I/O expansion box with a VC707 board | Yes, if connected via PCIe to a simulator | Yes |
| OP5700 with a VC707 board | Yes | |
| OP7020 I/O expansion box with a VC707 board | Yes, if connected via PCIe to a simulator | |
| OP7160/OP7161 | No | No |
| OP7170 | Yes | Yes |
| OP5143 standalone | Yes | No |
| OP4810 | No | No |
| OP4815 | No | No |