Certain cell monitoring devices can communicate with externally connected circuits via I2C or SPI protocols over GPIO lines. These external circuits, which act as I2C/SPI slaves, can be sensors, analog multiplexers, serial-to-parallel converters, and more. Although physical GPIO lines are absent in an emulated environment, it is possible to simulate the I2C/SPI slave as an external model on the target CPU and interface it with the emulated device on the FPGA. Communication is established through VeriStand channels instead of traditional I2C or SPI protocols. This guide provides an overview of the necessary project configuration to add the slave model and the command sequence to run during execution.
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Notice that since this communication happens at CPU level, there will be a timing limitation defined by how fast the CMDE Add-on and the Simulation External Model are executing.
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Project Configuration
Check Compatibility
Ensure the emulated cell monitoring devicesupports WRCOMM and STCOMM commands. Documentation on supported commands for each Device type can be found in this Wiki space.
Add External Model
Create a model of the external circuit and add it to the VeriStand project. Refer to Integrating and Executing Models for detailed instructions. The model interface should include:
Two inputs to receive COMM Register data from the emulated cell monitoring device:
Input 1: Control bits (ICOMx[3:0] and FCOMx[3:0])
Input 2: Data bits (Dx[7:0])
Two outputs to write data to the COMM Register of the emulated cell monitoring device:
Output 1: Control bits (ICOMx[3:0] and FCOMx[3:0])
Output 2: Data bits (Dx[7:0])
Map Signals
In the VeriStand Editor, connect the signals between the external model and the cell monitoring device:
Map the WRCOMM Command and WRCOMM Data device channels to the inputs of the external model.
Map the outputs of the external model to the STCOMM Reply Command and STCOMM Reply Data device channels.
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