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The RT-XSG blockset is organized in a series of sub-libraries accessible via the library browser of Simulink.

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Applications

The blocks of this library are used for producing or interpreting waveform signals typical to RCP or HIL simulations, and that can be connected to I/O management blocks.

• Standard blocks like PWM, Resolver, Encoder, or Time-stamp input/Output blocks are located at the top-level of the Applications library;
• The RCP sub-library contains advanced PWM blocks and an Analog Input synchronization block;
• The RT-XSG Drive library contains a phase-domain permanent machine model and a series of quadrature transformation blocks (Park, Clarke, Concordia);
• The Subsection library contains block taht that help designers to build there design and are mandatory for the algorithm that automatically connections generates files (see details on CONF or OPAL file).

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The Common blockset contains blocks that can be used with any FPGA supported by RT-XSG.

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OP717x, TE0471, VC707

These libraries contain the blocksets specific to the FPGAs supported by RT-XSG, They are organized in three sub-libraries:

• Data packing and unpacking: contains blocks to be connected to I/O interface blocks for producing or interpreting waveform signals;
• Inter-FPGA COMM: contains blocks used in FPGA simulations distributed over two or more FPGAs when the FPGA calculation step must be synchronized and data must be exchanged between the FPGAs via high-speed links;
• LowSpeedCommunication: contain blocks of the OPAL-RT TECHNOLOGIES ORION communication protocol.

RT-XSG Description Modules

The blocks of this library are used for describing the properties and IO interfaces of RT-XSG blocks. These blocks are used in the context of the RT-XSG Modules project for automatic generation of IOCONF firmware description files. The library is organized in 3 types of blocks, the property block, the input blocks and the outputs blocks.

• The property block is used to define a block as a feature block and its properties
• The input block is used to describe the inputs of the block and their signal formatting,
• The output block is used to describe the outputs of the block and their signal formatting,

The input and output blocks come in a few pre-constructed options.

• The serial blocks are used for FLWS communication, passthrough or packed/unpacked
• The parallel blocks are used for Xilinx standard muxed communication, passthrough or packed/unpacked, using Xilinx slices or concats to pack and unpack the signal defined in the UI.

SerialInterface

This library contains block for serial communication using some established protocols.

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