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Objective
Validate the interface provided by OP8219
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between the
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dynamometer encoder module
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and the
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OPAL-RT simulator
Validate the interface provided by OP8219 between the 8857/37 inverter
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modules (gate signals) and the OPAL-RT simulator
Description
This section presents integration of the Festo 2 kW dynamometer encoder module and 8857/37 inverters into OPAL-RT simulator using the Festo 8219 OP8219 inverter/decoder interface unit and OP8662 high voltage and current measurement unit.
The user is presented with a SIMULINK-based model to perform a basic operation of the dynamometer encoder module and Festo 8219 Festo 8857/37 inverter.
Model Overview
The RT-LAB model depicted in figure 1 consists of two subsystems.
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The subsystem consists of five areas as shown in figure 2:
The blue area (PWM Enable (Module 1, 2)) enables the PWM signals of the inverter modules
The green area (Frequency Reference (Module 1, 2)) is dedicated to adjusting the switching frequency of the inverter modules
The yellow areas (Duty Cycle Reference (Module-1)) and orange (Duty Cycle Reference (Module-2)) areas are used to set individual modulation indexes for each leg of the inverter modules.
The gray area (Signal Monitoring) is the block for receiving and monitoring data from the OPAL-RT simulator
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The OP5707 IO Interfaceis used to interface the PWMs, voltages, current measurements, and encoder signals
ThePWM_GENERATIONgenerates the PWM signals for the inverter modules based on the modulation index and switching frequency set by the user
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Connection Diagrams
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Power off equipment before connecting any cable. See the Test Procedure below. |
The connections of the OP5707 to the OP8662 and to the OP8219 are demonstrated in figure 4. The encoder terminal (DB9F) of the dynamometer needs to be connected to the encoder input (DB9F) of the OP8219 to measure the speed and position of the WRIM (DFIG). Connections must be performed as shown in figure 4.
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Ensure that the Festo inverter modules 8857 are powered on using the 24 V AC voltage provided by the Festo power supply 8525 (figure 10).
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Ensure that the 120 Ω resistive load Festo 8509 is switched on.
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Launch RT-LAB.
Import the model zip file in RT-LAB (see below).
Build, load, and execute the model.
Adjust the variable voltage knob to establish an AC voltage level with the amplitude of 80 Vpeak (Line-to-line voltage).
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The PWM signals are enabled for the 3-phase inverter Festo 8857 modules 1 and 2 by changing the reference from ’0′ to ’1′ (figure 17)
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The modulation referencereferences for the Festo 8857 inverter is set to ’ should read “0.5′ ” as shown in the following figure for modules 1 and 2. If not, set the references as so.
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Set thereference frequency to ’4000′ for modules 1 and 2.
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Based on the preceding tests, the hardware and software included in Festo’s models are declared fully functional and compliant with OPAL-RT specifications.
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| Info |
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The firmware is provided in themodel below is for OP4512 (AMD Kintex™-7, 325T FPGA) the OP5707/OP5707XG (AMD/Xilinx Virtex™ 7 FPGA VC707) simulators only. For firmware for other compatible OPAL-RT simulators, please contact your local sale representative. |
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