Versions Compared

Old Version 2

changes.mady.by.user Sylvain Ménard

Saved on

compared with

New Version Current

changes.mady.by.user Etienne Leduc

Saved on

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.


Model name

Four PV power system with 3-phase 2-level inverters

Highlights

No decoupling

Model diagram

Inputs (sources)

7

Switches

2732

Outputs (measurements)

3431

States (L, C, ...)

5175

Hardware

OP5707XG

  • Motherboard: X11DPL-i
  • Processor: Intel(R) Xeon(R) Gold 5222 CPU @ 3.80GHz; 8 cores
  • FPGA: Xilinx Virtex™ 7
    • RAM: 32 GB

    OP4810-IO

    • FPGA: Xilinx Versal VM1302

    Software

    • Platform: RT-LAB or HYPERSIM

    Minimum license required

    		eHSx64eHSx32

    Minimum time-step

    		eHS Gen4

    eHSx32 Standard:

    880

    1280 ns

    eHS

    Gen5: coming soon!

    High Performance: 230 ns