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- The lower section of the chassis contains a powerful target computer that can be added to a network of simulators or can be used standalone. It is used to run simulations built with OPAL-RT’s RT-LAB or HYPERSIM software simulation platform and includes the following features:
- MicroATX motherboard
- OPAL-RTLinux real-time operating system
- Intel® Xeon® 4 cores, 3.7 GHz CPU
- 16 GB of DRAM
- 256 250 GB SSD disk
- 1 free PCIe slots
- Standard computer ports. See section OP4512 Simulator Specifications for details.
- The upper section contains the high-speed FPGA and the I/O modules with conditioning for up to 128 I/Os. It includes:
- A Xilinx® Kintex®-7 FPGA programmable from the target computer via PCIe. The FPGA is used to execute models designed with the OPAL-RT RT-XSG toolbox, manage the I/O lines and execute embedded FPGA-based simulations. It exchanges data with the real-time simulations running on the target computer CPUs via the PCIe link, an 8-slot flat carrier board capable of connecting any combination of up to 4 digital or analog conditioning modules.
- Each module controls 16 or 32 I/O analog or digital channels, for a total of up to 128 channels.
- 4 SFP ports for high-speed communication with other FPGA-based systems or with external devices. The standard communication protocols available with the OP4512 are based on Xilinx Aurora (1 to 5 Gbps). Other protocols, such as the Gigabit Ethernet, can also be implemented.
- These SFP ports can be used to expand the simulator I/O capability using OPAL-RT’s Multi-System Expansion link (MuSE): each port can be connected to one OPAL-RT remote I/O unit (OP4520, OP5607, OP5650, OP5705-IO, OP5707-IO) effectively increasing the simulator I/O capability to a maximum of 1024 channels.
- SFP ports not used for MuSE remain compatible with the legacy Generic Aurora link. The MuSE link is compatible with OPAL-RT boards' I/O management architecture.
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Many combinations of compatible I/O modules are possible. Please refer to the Compatibility chart. Check for a typical configuration in the section below.
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