Page Comparison

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Generation

New Features

eFPGASIM version

Gen5

2.7+ Beta

3.X

Gen4

Minimum Time step : 200ns
Major upgrade of Gen3
- Support single cycle model coupling (FD Line - Saturable Transformer)
Support of OPAL-RT Schematic Editor

2.X - 3.X

Gen3

Minimum Time step : 200ns
Nodal circuit analysis
Backward Euler discretization
Introduction of LCA (Loss compensation algorithm)
- 2-Level Converter
- Neutral Point Clamped Converter

1.X

Deprecated in 2.0

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Version

Features

Limitations

From
eFPGASIM 2.9

Single Phase Cycloconverter

The following basic components is NOT supported:

From

eFPGASIM 2.17

3-lvl T-Type

The following basic components is NOT supported:

From

eFPGASIM 2.19

De-coupling blocks

The following basic components are NOT supported:

Image Added

eHS Gen5

Version	Features	Limitations
From eFPGASIM 2.8	Gate Control	The Polarity parameter CANNOT be assigned to Low. Only active high is supported at the moment.

Known problems with using specific non-ASCII characters in some fields. These are summarized here.

Field	Limitations
Schematic Editor - names of components	in names of in/outputs, “/” are transformed into “-” from Simulink’s side.
eHS OpalBoards block - block name	a clear error is seen on build whenever a character is used in the eHS block name that is not alphanumeric or in the list seen above (space, underscore, etc). I would call this limitation already documented, since the error is already well-reported and points the user to the problem reasonably well.
eHS S-Function block - block name	error is seen on build if the name of an eHS block contains an odd number of (“) double quote characters.

Aside from the special cases mentioned above, these fields seem to work for all UTF-8 characters (models build, load and run).