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The de-coupling concept

Decoupling is used to obtain better time step when necessary (i.e. when the timestep achieved without decoupling is not small enough for the application).

The principle is that the circuit will be divided in sub-circuit. Each sub-circuits are run independently to one another and will share some variables only to be coupled to another subcircuit.

Example of decoupling a circuit by half:

a circuit of size

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bodyN
states will required
Mathinline
bodyN^2
operation.

If this circuit is divided into two subcircuits of size

Mathinline
body\frac{N}{2}
, the number of operation will be
Mathinline
body\left( \frac{N}{2} \right)^2
for the first subcircuit, and
Mathinline
body\left( \frac{N}{2} \right)^2
for the second.

So the two sub-circuits will take

Mathinline
body\left( \frac{N}{2} \right)^2 + \left( \frac{N}{2} \right)^2
operations
Mathinline
body=2\frac{N^2}{4}=\textcolor{red}{\frac{N^2}{2}}
operations.

In conclusion, dividing a circuit by two rqual equal subcircuits will, in principle, reduce the number of computation by half, and the main advantage will be a faster execution of the model.

The main drawback is that the decoupling introduces a delay of one eHS time step between the two sub-circuits, which if introduced at the wrong location, could hurt the accuracy and stability of the simulation.

A general rule is to decouple ONLY when necessary.

How to get the best of de-coupling

When to decouple

The decoupling is necessary to reduce the time step of big circuit that have good decoupling points (variable or state calculations where we could easily introduce a delay) and where the time step reached without decoupling is quite large (>5% PWM period used for gating signals for example).

When not to decouple

Sub-circuits becoming too small will actually tend to increase the achieved time step. There is a critical size under which a sub-circuit will not execute any faster (below 16 states for example).

If the achieved time step is already sufficient for the application (<1% PWM period for example), solving the system without any decoupling will always be better as a stability and accuracy standpoint.

Find a good decoupling spot

1. DC Bus capacitor

Probably the best decoupling spot in most power electronics circuits are strong DC bus. The reason is that the voltage of the DC capacitor is usually a stable state variable of the system, and it could be used to decouple. Introducing a few hundreds of ns of delay will not have a significant stability and accuracy impact at the end.

2. AC filter / Line

3-phase AC inductors, used to filter current harmonics, could also be a good decoupling point for AC 3-phase systems. The currents flowing through the inductors can be used as decoupling variables. It is less effective as the DC bus decoupling though.

Decoupling within an eHS circuit

Requirements

Note

This feature is only available from eFPGASIM 2.19

This feature requires a specific licence : EHS_HIGH_PERFORMANCE_TOKEN

Schematic Editor blocks

Once a good decoupling spot is found, the user must replace the capacitors or inductor by a decoupling block that can be found in the Schematic editor library.

image-20240911-183150.png

There are seven decoupling blocks in total, three inductive and four capacitive. The inductive blocks shall be used to replace existing series-connected inductances and the capacitive blocks replace shunt capacitors. It is worth mentioning that two phase inductive decoupling block has exactly the same behavior of two single-phase inductive blocks; the use of multi-phase blocks allows to create a clearer diagram, keeping the same functionalities.

image-20240911-203233.png

There are two capacitive blocks contains three capacitors: “delta” and “wye”, and they behave just like a capacitors bank connected in delta or wye, respectively, with a forth pair of ports in the wye-connected block to provide access to the neutral point.

Procedure

To show how to decouple a circuit using the new decoupling blocks in Schematic Editor, the Decoupling example model, an Aero Microgrid circuit, will be used. The Decoupling example model documentation can be found here. An overview of the circuit is presented below.

Circuit.png

The circuit has 4 three-phase AC voltage sources going into 4 different loads next to each source. Between the voltage sources are switches to turn on or off the connection between them. The sources are also connected to 4 rectifier circuits, one at each load. On the other side of the rectifiers are DC loads.

Status on eFPGASIM 2.18

If we build and run the original Microgrid example model with eFPGASIM 2.18, without any decoupling, we observe a minimum time step of 1755 ns in High Performance mode.

The voltages RMS on phase A vary near 231 V for all 4 AC sources, measured on the load. The power is measured at approximately 6850 Watts per source. A voltage of approximately 320 V of amplitude is applied to the AC load 1, and the AC voltage source 1 outputs a current of approximately 14 A of amplitude. The rectified tension varies near 29 V, and the current near 58 A.

218_results.PNG218_bus1.PNG218_g1.PNG218_rect.PNG

De-coupling on eFPGASIM 2.19

Starting from eFPGASIM 2.19, decoupling is introduced. Without any manual action, some circuits will see improvements from existing decoupling points, without having to make any change. In our example model, this is not the case. To see improvements, we need to add decoupling blocks to further divide the circuit. Examples of good decoupling points are shown above in the How to get the best of decoupling section.

In this Microgrid model, we want to separate the DC section of the circuit from the AC one. To do so, two decoupling blocks are added at the exit of rectifiers. These decoupling blocks replace the capacitors that were previously there. The animation below shows how to replace one of the capacitors with a decoupling block.

SchematicEditor-Replace-720.gif

Now that we’ve replaced some capacitors with decoupling blocks, the DC part of the circuit is now separated. When building the model, we now observe an improved minimum time step of 1305 ns in High Performance mode, an improvement of ~25 % compared to the previous 1755 ns. When running the decoupled model, we observe approximately the same results as before the decoupling.

The voltages RMS on phase A vary near 231 V for all 4 AC sources, measured on the load. The power is measured at approximately 6837 Watts or 6820 Watts per source. A voltage of approximately 320 V of amplitude is applied to the AC load 1, and the AC voltage source 1 outputs a current of approximately 14 A of amplitude. The rectified tension varies near 29 V, and the current near 58 A.

219_results.PNG219_bus1.PNG219_g1.PNG219_rect.PNG

Known limitations

A bad usage of de-coupling blocks could lead to wrong results. Please be aware of such expected behaviors.

Parasitic components

When adding an inductive decoupling block, parasitic capacitance are also added. In the case of a capacitive block, parasitic inductor are added.

image-20240912-141811.png

image-20240912-141820.png

The parasitic components values are given by:

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anchor
alignmentleft
C_{parasitic} = \frac{T_{eHS}^2}{2 L_{decoupling}}
Mathblock
anchor
alignmentleft
L_{parasitic} = \frac{T_{eHS}^2}{2 C_{decoupling}}

where

Mathinline
bodyT_{eHS}
is eHS simulation time step.

Other limitations

Limitation

Large impedance (> 1 kΩ) seen by capacitive de-coupling block causes unstable and large output values

Unconnected terminals in a multi-phase block can cause unstable output values (even if an equivalent circuit using actual capacitors would produce reasonable results)