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The OP4810-IO and OP4815-IO are I/O expansion units that include top-of-the-line AMD Versal™ Prime adaptative SoC line of compute engines (FPGA).
They are designed to add powerful FPGA compute capabilities and plenty of additional and fast I/Os to OPAL-RT’s real-time HIL simulators.
They are compatible with the OPAL-RT simulators:
OP4610XG (compact mid-range simulator)
OP5033XG (real-time computer simulator)
OP5705XG (versatile simulator)
OP5707XG (high-end simulator)OP4512Compact entry-level RCP-HIL FPGA-based real-time simulator
OP4610XG Compact mid-range simulator
OP5020XG Real-time computer-based simulator
OP5025XG Real-time computer-based simulator
OP5033XG Real-time computer-based simulator
OP5705XG Versatile simulator
OP5707XG High-end simulator
Both units are identical, except for the Versal™ Prime model.
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It exchanges data with the real-time simulations running on the remote target computer CPUs via the PCIe link.
Compatible I/O module is described here: OP48H00 I/O Modules Series for OP4800 Line of Devices.
12 SFP ports are available for high-speed communication with other OPAL-RT FPGA-based systems or with external devices.
The standard communication protocols available with the OP4810-IO/OP4815-IO are based on the Aurora protocol (2 to 5 Gbps).
Other protocols, such as the Gigabit Ethernet, can also be implemented.4 SFP ports numbered CH00 through CH03 are reserved to expand an OPAL-RT’s simulator I/O capability using OPAL-RT’s Multi-System Expansion link (MuSE) /wiki/spaces/HDGD/pages/4725237.
They are identified MuSE numbered CH00 through CH03 on the front plate (photo below).
MuSE link is compatible with OPAL-RT boards I/O management architecture.
NOTE: MuSE will not be supported with the release of RT-LAB and HYPERSIM (version 2024.2) at time of first product delivery.
Expect Q1-2025 for MuSE support in RT-LAB and HYPERSIM.The 8 SFP ports numbered CH04 through CH11 not used for MuSE are compatible with the legacy generic Aurora link.
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