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Model name

600-node 20 kV distribution system

Highlights

4 eHS cores on 2 FPGA

Model diagram

Inputs (sources)

3

Switches (3-phase breakers)

5

Outputs (measurement)

0

States (L, C, ...)

9

Lines (3-phase RL)

208

Loads (3-phase RL)

124

Hardware

OP5707XG

  • Motherboard: X11DPL-i
  • Processor: Intel(R) Xeon(R) Gold 5222 CPU @ 3.80GHz; 8 cores
  • FPGA: Xilinx Virtex™ 7
  • RAM: 32 GB

Software

  • Platform: RT-LAB or HYPERSIM

Minimum license required

4x eHSx128

Minimum time-step

eHS Gen4: 3 us

eHS Gen5: coming soon!

...