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CIGRE Interface


The CIGRE Interface block allows users to integrate the code of a controller based on the recommendations of the IEEE/CIGRE B4.82 working group which allows to standardise the integration of real manufacturer code in simulation software. To do so, the controller must be provided as a “.dll” file which follows the API proposed by the working group ().

Exemple of a control Interface Block inside HYPERSIM framework

Workflow

The interface block workflow is quite different from most blocks in HYPERSIM.

Adding a new CIGRE interface block to the diagram adds an empty block, which means that the CIGRE controller is not represented at all in the netlist yet.

image-20241009-162710.png

By double clicking on the empty block, a mask is presented which allows to add, import a new Interface Block Definition, or select one that has been added previously.

Once the definition is selected, information on the CIGRE library such as the list of input/output signals, the list of parameters are displayed, the description and the compilation date.

 

Clicking on the Apply button creates an instance of the CIGRE interface definition. Multiples instances of the same CIGRE definition can be added to a single HS model. Each instance of the block has his own configuration and parameters can vary from an instance to another.

Mask and Parameters

Top bar of the mask

At the top of the mask, the Interface Block Definition name of the control block is displayed, as well as the type of interface used (CIGRE or FMU).

Name

Description

Unit

Variable = {Possible Values}

Name

Description

Unit

Variable = {Possible Values}

Sample time

Rate at which the controller is executed.

When set to “Auto”, the controller will be executed at the same rate as the simulation time step. When set to a custom value, the controller will be executed in multi-rate with HYPERSIM. For example,

  • If HYPERSIM simulation time step is set to 50 us, and the block Sample time is set to “auto”, the controller code will be called at each simulation steps (50 us).

  • If HYPERSIM simulation time step is set to 50 us, and the block Sample time is set to 10 us, the controller code will be called 5 times per simulation step, and the input signal values of the controller will be repeated each times.

  • If HYPERSIM simulation time step is set to 50 us, and the block Sample time is set to 200 us, the controller code will be called every 4 simulation steps.

Currently, even if the block sample time is slower than the simulation time step, the simulation step will wait for the block to be fully executed before advancing to the next simulation step. This is a current limitation and may be improved in future updates by allowing the block to be executed in parallel to the simulation steps.

N/A

On/OFF

Parameters tab

The parameter tab displays the list of CIGRE parameters. These parameters are specific to a CIGRE definition.

The value of each parameters can be changed before starting the simulation. The value of Tunable parameters can also be updated during the simulation. The default value, data type and tunable properties of a parameter are defined by the CIGRE library and cannot be changed.

 

 

Simulation tab

The simulation tab allows to configure the execution of the CIGRE library.

 

 

Name

Description

Unit

Variable = {Possible Values}

Name

Description

Unit

Variable = {Possible Values}

Expected performance

This parameter helps HYPERSIM Task Manager | Summary and Preferences to assign the task containing the CIGRE interface block to a RT core. It should be set to an approximation of the computational time taken by the block to execute the CIGRE block.

This parameter do not take into account the performance factor of the target running the mode.

microseconds

 

Inputs, Outputs and Signals Available for Monitoring

The input and output signals of the block are listed in the “Inputs/Outputs” table of the CIGRE mask. Every signals are available for monitoring.

Signal names using a “:XX” suffix with XX being a number will be grouped in a bundle.

See Also

 

https://opal-rt.atlassian.net/wiki/spaces/PDOCHS/pages/1150616042

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