1 Description
2 Mask and Parameters
- 2.1 AVR Parameters
- 2.2 Exciter Parameters
- 2.3 Initial Values
3 Inputs, Outputs and Signals Available for Monitoring
- 3.1 Inputs
- 3.2 Outputs
4 References

Description

This model is based on the ST4B excitation system in which is applied a low-pass filter to the terminal voltage transducer output, EC. This model is a variation of the Type ST3A model, with a proportional plus integral (PI) regulator block replacing the lag-lead regulator characteristic that was in the ST3A model. Both potential-and compound source rectifier excitation systems are modeled as shown in the figure below. The PI regulator blocks have nonwind up limits. The voltage regulator of this model is typically implemented digitally, so the model is identified with the suffix “B.”

IEEE, "IEEE Recommended Practice for Excitation System Models for Power System Stability Studies," in IEEE Std 421.5-2016

The other features of the regulator are a low value gate for the OEL limit function, and the UEL and V/Hz control are summed into the input to the regulator. This means that on a unit with PSS control, the PSS will be active if the unit goes into UEL limit control, unlike some previous designs that had take-over type limiters. There is flexibility in the power component model to represent bus-fed exciters (KI and XL both equal to zero), compound static systems (XL = 0), and potential- and compound-source systems where XL is not zero. The appropriate PSS model to use with the ST4B excitation model is Type PSS2B.

Mask and Parameters

AVR Parameters

Expanding the "AVR diagram" displays the block diagram in the parameters window.

Name	Description	Unit

Name	Description	Unit
Tr	Regulator input filter time constant	s
Kpr	Voltage regulator proportional gain	-
Kir	Voltage regulator integral gain	-
Vrmin	Minimum voltage regulator output	pu
Vrmax	Maximum voltage regulator output	pu
Ta	Voltage regulator time constant	s
Kg	Feedback gain constant of the inner loop field regulator	-
Kpm	Voltage regulator proportional gain	-
Kim	Voltage regulator integral gain	-
Vmmin	Minimal output factor of converter bridge corresponding to firing angle command to thyristors	pu
Vmmax	Maximal output factor of converter bridge corresponding to firing angle command to thyristors	pu

Exciter Parameters

Expanding the "Exciter diagram" displays the block diagram in the parameters window.

Name	Description	Unit

Name	Description	Unit
Kp	Potential circuit real part gain coefficient	-
Kj	Potential circuit imaginary part gain coefficient	-
Xl	Reactance associated with potential source	pu
Kc	Rectifier loading factor proportional to commutating reactance	-
Vbmax	Maximum available exciter voltage	pu

Initial Values

Name	Description	Unit

Name	Description	Unit
Efd0	Initial exciter output voltage	pu
Ifd0	Initial exciter output current	pu

Inputs, Outputs and Signals Available for Monitoring

Inputs

Name	Description	Unit

Name	Description	Unit
E_C	Output of terminal voltage transducer and load compensation elements	pu
V_UEL	Underexcitation limiter output	pu
V_S	Is defined as the output voltage of a Power System Stabilizer (PSS) [1].	pu
V_REF	Voltage regulator reference voltage	pu
V_T	Synchronous machine terminal voltage	pu
I_T	Synchronous machine terminal current	pu
I_FD	Synchronous machine field current	pu

Outputs

Name	Description	Unit

Name	Description	Unit
EFD	Exciter output voltage	pu

References

[1] "IEEE Recommended Practice for Excitation System Models for Power System Stability Studies," in IEEE Std 421.5-2016 (Revision of IEEE Std 421.5-2005) , vol., no., pp.1-207, 26 Aug. 2016, doi: 10.1109/IEEESTD.2016.7553421.

HYPERSIM Documentation

ESST4B