Analog Output Mapping and Rescaling Block V2
FLWS Filter
1D-LookUp Table for XSG
Variable state space block
SFP Mapping and Communication Block
FLWS Mapping and Rescaling Block
Analog Output Mapping and Rescaling Block V2
Angle Sensor Emulator block
Capacitor Differential Equation Solver
Digital Output Mapping
Discrete 1-Phase PLL
Discrete First-Order Filter Single floating-point
Discrete Second-Order Filter
Dual PMSM Model
Dual PMSM SH Solver block
Dual PMSM VDQ Solver block
Dual Resolver Encoder
eHS solver for RT-XSG block
eHS Gen3 solver for RT-XSG block
eHS to Machines Mapping Interface
FPGA 64-to-64 Interconnect Block
Analog Output Mapping and Rescaling Block
Analog Input Differential Rescaling Block
eHS Gen3s Solver for XSG
eHS Gen4 Solver for XSG
Frame-based LightWeight Serial FLWS Protocol for RT-XSG models
Frequency dependent line
Generic Machines block
Induction Machine Solver block
Initialization Bus Address Filter
Initialization Bus Data ID filter
Initialization Bus Param ID filter
Initialization Bus Ram Interface
Initialization Decoder
Integrator Block
Machine to eHS Interface 4x and 8x
Mechanical Model Block
Parallel to Parallel Interface block
PI Controller block
PID Controller block
Resolver Encoder block
Route Mechanical Signals block
RT-XSG Scope Block
RT-XSG Scope Series Block
Saturable transformer
Selectable Digital Input
Selectable Digital Output
Serial to Parallel Interface block
Switched Reluctance Machine Solver block
Time-multiplexed Capacitor Differential Equation Solver
XSG thermal losses block
Custom Model XSG
eHS Gen5 Solver for XSG
Induction Machine With Saturation block
Six Phase Pmsm Solver block
SFP Data Type Convert for FLWS
FPGA Power Measurement
FPGA Min Max Measurement Block
Digital Input Mapping Block

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