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OP48H30 - High Density I/O type H Module
Page Contents
The OP48H30 I/O module provides 64 configurable digital inputs or outputs, 16 analog inputs and up to 48 analog outputs for the OP48xx series of FPGA and expansion units.
This card is only compatible with OP4800 series of devices. See the hardware platform compatibility chart for more information.
Main Features
64 digital inputs or outputs channels divided into 4 banks of 16 channels. Each bank is configurable as inputs or outputs by software.
Input 0-30 V single-ended range with user-programmable VTH/VTL thresholds.
Outputs, 4.8 V internally supplied voltage or 5-30V with voltage rail externally supplied by the user.
16 analog inputs, sampling rate at 2 MSPS on 16 bits, ±10 V single-ended or differential range.
Analog outputs, factory-calibrated ±10 V range:
48 channels at 1 MSPS on 16 bits,
or24 channels at 2 MSPS on 16 bits.
OP8331 splitter cables (sold separately) can be used to split one DB62 port into two (2) DB37 ports.
Detailed non-functional and performance specifications can be found on the OP48H30 Specifications page.
This page contains high-level architectures and functional specifications.
Digital Inputs Channel Description
Four banks of 16 channels are provided (up to 64 total digital inputs), each bank has software-configurable VTH and VTL input thresholds adjustable from 0 to 30 V.
High-Level Circuit Diagram (per channel):
Digital Outputs Channel Description
Four banks of 16 output channels are provided
The supply voltage used by digital outputs has to be routed externally into the DB62 connector (P2 and P4, see DB62F Pin Assignment). The user can choose between:
Use the internal 4.8 V from the OP48H30.
Connecting its own supply (5-30V V range, referred to GND, see diagram below)
Each output channel implements an output solid-state relay which opens if any condition below is met:
There is an overtemperature fault on any Digital OUT banks
There is an overvoltage condition on the VUSER supply rail
The simulator is disabling the Digital OUT banks
High-Level Circuit Diagram (per Channel)
Additional signal conditioning may be required to compensate for long cables or highly capacitive loads. Please refer to Reducing DOUT Overshoots Using Snubber Terminations.
Analog Input Channel Description
A single bank of 16 analog input channels is provided. Each channel uses a 16-bit resolution analog-to-digital (ADC) converter. Each ADC can sample up to 2 MS/s, giving a total throughput of 16 MS/s, all channels being simultaneously sampled.
±10 V differential input range (with a ±5 V common-mode rejection) or ±10 V with AIN_N connected to GND
16-bit A/D conversion
Factory-calibrated
High-Level Circuit Diagram (per Channel)
Analog Output Channel Description
A single bank of 48 simultaneously sampled analog output channels is provided. Each channel uses a 16-bit resolution digital-to-analog converter and provides a ±10V single-ended output voltage.
The user can choose one of two sampling configurations below :
48 CH @ 1 MS/s. All channels are simultaneously sampled.
24 CH @ 2 MS/s. Only even channels (CH00, CH02, CH04, …) are simultaneously sampled while odd channels (CH01, CH03, CH05, …) are deactivated.
Factory-calibrated.
High-Level Circuit Diagram (per Channel)