When connecting OPAL-RT digital inputs or outputs TTL/CMOS boards with third-party devices (or user ECUs), there are certain steps to ensure good signal integrity over transmission lines with a matching scheme to absorb any reflections that may be generated by the source, the driver or load, and the receiver.

The standard termination configuration components are shown in the schematic below.

With this circuit, the OP8330-1 offers four different options of termination circuit, described below:

Series	R1
Parallel	R2 R1=C1=0Ω
AC	R2 & C1 R1=0Ω
Low pass filter	R1 & C1 R2=0Ω
Voltage divider	R1 & R2 C1=0Ω

Series Termination

Series termination consists of a resistor in series with the driving device output. Referring to the diagram above, only R1 is installed.

The value of the series resistor is usually 10Ω ≤ R ≤ 50 Ω (useful for point-to-point driving).

Parallel Termination

It consists of a single resistor tied to GND. Referring to the diagram above, R2 is installed and appropriately sized, whereas R1 and C1 are short circuits.

The ideal value of the resistor is R = ZO, and the best placement for it is as close to the receiver as possible.

A heavy increase in power occurs, but no further delay is present. There is a relatively low DC noise margin in this configuration.

AC Termination

It consists of a capacitor in series with a resistor, both of which are running parallel to GND. Referring to the diagram above, R2 and C1 are installed and appropriately sized, whereas R1 is a short circuit.

The ideal value of the resistor is R = ZO, and the value of the capacitor should be between 10pF and 330 pF.

They should both be placed as close to the receiver as possible.

This consumes the most power as the frequency increases, but no additional delay is experienced. At DC, no power is required.

Note: This termination technique can be optimized for only one signal frequency.

Low pass filter

To reduce noise from the source or coupled in the cables, a low pass filter can be added to the input of the simulator or the the unit under test. Referring to the diagram above, R1 and C1 are installed and appropriately sized, whereas R2 is a short circuit.

The low-pass filter can be implemented with either an L-C or R-C circuit.

Divider

If the signal is too high for the simulator, a divider network can be added. Referring to the diagram above, a combination of R1 and R2 are installed and appropriately sized, whereas C1 is a short circuit.

If the input impedance is known (i.e. 500k from Ain), the voltage divider can only be a series resistor (R1). If the input impedance is unknown, a standard divider can be used using the 2 resistors.

In this last case, the divider impedance should be low compare to the current draw by the input.

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