Documentation Home Page Hardware Home Page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.

OP5607 System Description

The OP5607 expansion unit was designed with the Xilinx VC707 Virtex-7 FPGA development board to provide additional signal conditioning to OPAL-RT simulators. The FPGA, which can be programmed either through the target computer’s PCIe or via the MUlti-System Expansion link (MuSE), is used to execute models designed with OPAL-RT RT-XSG, manage I/O lines and execute embedded FPGA-based simulations.

The combination of this high-end FPGA, with a high number of I/O lines (up to 256), and high-speed connectivity for communication with the OPAL-RT simulator and with third-party units under test (UUT), makes the OP5607 perfectly suited to complex or I/O intensive simulations.

Features

  • Xilinx Virtex-7 FPGA technology: programmed using the target computer via PCIe or MuSE, the FPGA is used to execute models designed with the OPAL-RT RT-XSG tool, manage the I/O lines and execute embedded FPGA-based simulations. It exchanges data with the real-time simulations running on the target computer CPUs via the PCIe link.
  • Capable of controlling any combination of up to eight OP5300 Mezzanine Modules (analog or digital). Each module controls 16 or 32 lines for a total of up to 256 I/O.
  • PCIe x4 connector 
  • 16 SFP ports for high-speed communication between FPGA-based systems or external devices

System Overview 

The OP5607 comes in two versions: the OP5607-IO-PCIe which connects to the real-time simulator via a PCIe link, and the OP5607-IO-REMOTE, which uses SFP transceivers and an optical cable to connect to the simulator via the MuSE link.

The figure below gives a graphical overview of both options.

OP5607 Architecture

SFP Interconnection Details

The sixteen SFP sockets allow interconnection with other OPAL-RT chassis or external devices, like amplifiers or MMC controllers. The standard communication protocols available with the OP5607 are based on Xilinx Aurora (1 to 5 Gbps). 

There are two standard modes of operation available for the SFP ports, both based on the Xilinx Aurora communication protocol:

  • Generic Aurora communication: this mode is enabled using the Generic Aurora blocks of the OPAL-RT RT-XSG toolbox. These blocks are used to exchange data with third-party devices or with other OPAL-RT systems. The data communication layer (data packing/unpacking) must be configured by the user according to the targeted application. The communication speed is configurable between 1 and 5 Gbps and the SFP transceivers must be selected accordingly.
  • OPAL-RT MUlti-System Expansion link (MuSE): this mode encapsulates the Aurora protocol within a network protocol designed by OPAL-RT for inter-system communication. The communication speed is set to 5Gbps by default, but downgrades automatically to the speed of the other port, if that port is used at a lower speed for third-party device connection. The PCIe connection with the real-time simulator is not needed in this configuration. Only one SFP is used for the MuSE link, the other SFP ports remain available for the legacy Generic Aurora link.

Other protocols like the Gigabit Ethernet can also be implemented.

Note: The MuSE link is compatible with OPAL-RT Boards, OPAL-RT’s new I/O management software architecture. Restrictions to using MuSE with OPAL-RT Board software architecture may apply depending on your application and software configuration. Contact your sales representative or field application engineer to verify compatibility.




OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323
Follow OPAL-RT: LinkedIn | Facebook | YouTube | X/Twitter