About OPAL-RT Technologies' RT-XSG Toolbox

RT-XSG is a toolbox developed by OPAL-RT TECHNOLOGIES. It is invoked from within the Xilinx® Vivado® Design Suite System Generator environment. It is used to produce the configuration files (or bitstreams) of the FPGAs of OPAL-RT simulators.

The user has the freedom to generate a custom, application-specific model to be implemented onto the FPGA device. RT-XSG’s block set provides signal conditioning and conversion modules that can then be attached to the custom model for real-time, hardware-in-the-loop data processing. RT-XSG provides a convenient Simulink-based way to build the user model.

The RT-XSG toolbox thus makes FPGA-based co-simulation more straightforward by managing automatically the configuration file generation according to the specific processing algorithm to be implemented on the targeted FPGA. It also manages the configuration of the FPGA, as well as the transfer of high-bandwidth data between RT-LAB simulation models and the user-defined custom system running on the FPGA.

Key Features

Reconfigurability

The supported platform FPGA devices can be configured exactly as required by the user, not just with the board manufacturer default configuration. Integration with Simulink and the SystemGenerator for the DSP toolbox from Xilinx allows the transfer of Simulink submodels to the FPGA processor for distributed processing.

In addition, standard and user-developed functions can be stored on the on-board Flash memory for an instant start-up. RT-LAB-compatible platforms can be remotely configured using a network-based utility. Additionally, all RT-XSG supported products are configurable on the fly using a JTAG connection and the device vendor programming software.

The present guide covers features and blocks compatible with the following OPAL-RT products:

Xilinx VC707 Virtex-7 based platforms	OP5607, OP5700 and OP7020
Trenz electronic TE0741 Kintex-7 based platforms	OP4510 and OP4520
OPAL-RT OP5143 Artix-7 based platform	OP5650
OPAL-RT OP7170 Kintex-7 based platform	OP7000 V2
OPAL-RT Versal Prime based platform	OP4810 and OP4815

For support of Xilinx Spartan-3 or Virtex-6 based platforms, please refer to RT-XSG 2.3.x user guide.
For support of OP4200 (Zynq-7030) or Avnet MMPK7 (Kintex-7) based platforms, please refer to RT-XSG v3.3.x or prior to it.

Performance

All of our supported products enable update rates of 100 MHz or 200 MHz, providing the capability to perform time-stamped capture and generation of digital events for high precision switching of signals such as PWM I/O signaling up to very high frequencies, as I/O scheduling is performed directly on the board.

Channel Density

Our supported products let the user configure the I/O interfaces to the FPGA computational node according to its needs. The I/O block set targets the I/O conditioning modules such as the OP5300 family in order to provide real-time access to interface I/O signals. The channel density for each of the supported platforms is indicated in the user guide of each specific board.

Intended Audience and Required Skills and Knowledge

The intended user of the OPAL-RT TECHNOLOGIES RT-XSG Toolbox is an R&D, algorithm, or Test Engineer that needs a reconfigurable, very-high-speed, portable, and low-cost processing unit with good analog and/or digital I/O capabilities.

Hardware Description Language (HDL) and Fixed-Point Numbering

With the help of Xilinx System Generator for DSP blockset, only minimal programmable logic technical knowledge is needed to use the RT-XSG-supported platforms.

This blockset is used to translate a Simulink design built using particular library blocks into HDL. This translated design is used by OPAL-RT TECHNOLOGIES tools to give access to I/O interfaces and debugging facilities.

However, the user should be familiar with the fixed-point numerical format and fixed-point data processing.

The use of floating-point numbers is very heavily resource-consuming into FPGA processing devices and is not suitable in RT-XSG devices as the interface to the conversion modules is in a fixed-point format. Minimal training on FPGA architecture is also recommended.

Simulink

Simulink® is a software package developed by Mathworks that enables modeling, simulation, and analysis of dynamic systems. Models are described graphically, following a precise format based on a library of blocks. RT-XSG uses Simulink to define models that will be executed by the reconfigurable platform. It is expected that the user has a clear understanding of Simulink operation, particularly regarding the model definition and simulation parameters.

Organization of this Guide

Introduction	Provides an introduction to simulation and the principles behind the use of the RT-XSG toolbox for MATLAB Simulink;
Requirements	Software requirements for the use of the RT-XSG toolbox;
Hardware design using the RT-XSG Toolbox	Description of the paradigms behind the RT-XSG environment;
Building models with RT-XSG	Describes the procedure to develop an RT-XSG-compatible model;
Troubleshooting	Useful topics to resolve RT-XSG problems.

The documentation of the Simulink RT-XSG blocks is provided in the RT-XSG Block Library pages.

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