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EnDat Master

Block

Block

Mask

Mask

Description

The EnDat Master is responsible for communication with EnDat encoders from HEIDENHAIN. It allows simple transmission of position data and additional data to the higher-level application. The variant of EnDat master used in this block is EnDat master reduced (only EnDat protocol machine).

The data is transmitted in synchronism with the clock signal from the subsequent electronics. The type of transmission (position values, parameters, additional data such as temperature sensor value, etc.) is selected by mode commands that the subsequent electronics send to the encoder. 

At a system clock frequency of 64 MHz, the serial interface can be operated with a clock rate of up to 16 Mhz.



IMPORTANT: To be able to use the EnDat master, the user must obtain the IP Core "endatreduced" from AMS. The 2 vhd sources (endatreduced.vhd and pdm.vhd) must be copied to the model folder.



Parameters

Freq_OEM_Value Specification

This parameter allows the user to specify how to configure the frequency OEM value. Two options are available.

  • In the first option (As input port), the value to set the transmission frequency is provided externally to the block by the USER.
  • The second option (As Block Paramater) allows the user to enter the value from the block (IN this case, the value can only be modified by regenerating a bitstream).

The maximum value for freq_oem_value is 2047 : (2^11) - 1

Example: when "freq_oem_value" is set to 1, the transmission frequency is 16 MHz.

Freq_OEM_Value Specification

Freq_TST_Value Specification

This parameter allows the user to specify how to configure the recovery time III. Two options are available. In the first option (As input port), the value to configure the recovery time is provided externally to the block by the USER. The second option (As Block Parameter) allows the user to enter the value from the block (In this case, the value can only be changed by regenerating a bitstream).

The maximum value for freq_tst_value is 2047 : (2^11) - 1

This waiting time is necessary because, for start bit recognition, there must be a stable level on the data line. The level is driven by the encoder so that you have to wait until this level is stable on the subsequent electronics. 

With low transmissions rates (Tclk < 400 Khz) you set the same value as "freq_oem_value"

With high transmissions rates and long cables lengths, "freq_tst_value" must be clearly higher than "freq_oem_value". 

Please see EnDat specifications for more details.

Position Value Width Specification

This parameter allows the user to specify how to configure the Position Value Width. Two options are available. In the first option (As input port), the value to configure the width of the position value is provided externally to the block by the USER. The second option (As Block Parameter) allows the user to enter the value from the block (In this case, the value can only be changed by regenerating a bitstream).

The format for transfer of position values varies in length depending on the encoder model. The maximum bit width for the position transfer is 48 bit. This information can be read from the Word 13 in the Encoder memory.

Example: position value width = 25 bits

Other Tab

Provide port for CRC_ERRIf selected, the EnDat status signal  CRC_ERR is made available in the output of the block.
Provide port for CRC_OUTIf selected, the EnDat status signal  CRC_OUT is made available in the output of the block.
Provide ports for Error1 ans Error2If selected, the EnDat status signals error1 and erro2 are made available in outputs of the block.

General Tab

Sample PeriodDefine the sample period of the logic in the FPGA. This parameter cannot be modified by the user.


Note: Refer to D297403 - Bidirectional Synchronous-Serial Interface for Position Encoders specification from HEIDENHAIN for more details.


Inputs

RX_DATASerial data receive from from Encoder
STARTPulse to start EnDat Transmission
DIN

 Parralel data input.

The data available here must contain the data to be transmitted to the EnDat encoder. 

  • Byte 4 [29:24]: Mode Command
  • Byte 3 [23:16]: MRS Code / Address / Port Address  (depends on the mode command)
  • Byte 2 [15:8]: Parameters / Instructions (depends on the mode command)
  • Byte 1 [7:0]: Parameters / Instructions (depends on the mode command)

Please see EnDat specifications for more details about the command mode and DIN

Optional Ports

These ports are available only when the option is checked.

Freq_OEM_ValueProvides the temperature value.
Freq_TST_ValueProvides the additional sensor value.
PositionValueWidthProvides the commutation value.


Note: Refer to D297403 - Bidirectional Synchronous-Serial Interface for Position Encoders specification from HEIDENHAIN for more details.


Outputs

TX_CLKTransmission Clock to Encoder
TX_DATASerial transmit data
TX_ENABLEEnable serial data transmission
DOUT_PV At this output, the received data for position value is available and saved in the register. the "valid_pv" signal is used as register enable.
DOUT_AI1 At this output, the received data for additional information 1 is available and saved in the register. the "valid_ai_a" signal is used as register enable.
DOUT_AI2 At this output, the received data for additional information 2 is available and saved in the register. the "valid_ai_b" signal is used as register enable.
VALID status output
  •     VALID [0]: correspond to "valid_pv", the signal shows (depending on the mode command     used) a valid position value (or parameter) and crc value (valid value '1' / invalid value '0')
  •     VALID [1]: correspond to "valid_ai_a", the signal indicate valid additional information and     the pertaining CRC value (first received additional informataion is valid)
  •     VALID [2]: correspond to "valid_ai_b", the signal indicate valid additional information and     the pertaining CRC value (second received additional informataion is valid)

Optional Ports

These ports are available only when checkbox option is selected.

CRC_OUT

Received crc value outputs drom encoder. At these outputs, the CRC value transmitted by the encoder is available.                

  • CRC_OUT[4:0]: contains the received crc value pertaining to the value received (position value or parameter)               
  • CRC_OUT[9:5]: contains the received crc value pertaining to the first additional information                            
  • CRC_OUT[14:10]: contains the received crc value pertaining to the second additional information
CRC_ERROR

status bits created by the sequential control of the interface component. 

  • CRC_ERROR [0]: shows the result of the CRC of the position value (or parameter)
  • CRC_ERROR [1]: shows the result of the CRC of the first additional information
  • CRC_ERROR [2]: shows the result of the CRC of the second additional information
ERROR1Error bit 1 of EnDat protocol (Alarm1).
ERROR2 Error bit 2 of EnDat protocol (Alarm2).


Note: Refer to D297403 - Bidirectional Synchronous-Serial Interface for Position Encoders specification from HEIDENHAIN for more details.


Characteristics and Limitations

This Block has no specific characteristics or limitations

Direct FeedthroughN/A
Discrete sample timeN/A
XHP supportN/A
Work offlineYES

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