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Objective

Validate the advanced operation of the Festo 8857/37 inverter to regulate the DC link voltage

Description

This section presents the CPU model description and test procedure for testing the operation of the Festo 8857/37 inverter to regulate the DC link voltage.

Model Overview

The RT-LAB model consists of two subsystems:

• The SM_OP5707 subsystem consists of the model part that runs on the real-time simulator

• The SC_Offline_User_Interface subsystem consists of the user interface that runs on the host PC.

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Figure 1: RT-LAB model overview

The subsystem consists of three areas as shown in figure 2:

• The gray area is for receiving data from the simulator and monitoring the signals

• The blue area labeled as “Inverters control” is used to control the simulated model or the test bench, adjust the DC reference voltage, and enable/disable the inverter control signals that are sent to the simulator.

• The orange area presents important notes regarding the test instruction

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Figure 2: Contents SC_Offline_User_Interface inside the subsystem.

This subsystem also includes three areas, as shown in figure 3.

In this subsystem, the user is presented with a SIMULINK-based model to perform advanced control over Festo energy conversion hardware.

• The “OpComm” block receives the signals sent from the SC_Offline_User_Interface subsystem.

• The gray area simulates the inverter DC-link using SimPowerSystems’ universal IGBT bridge.

• The blue area labeled “OP8219 and OP8662 IO Interface” is used to transfer data between the target and the OP8662 unit as well as the OP8219.

• The DC bus control block diagram labeled as “DC-link Voltage Regulation” in the yellow area is shown in figure 4.
  A PI-based cascaded voltage and current controller is developed in this area to control the three-phase currents of the inverter based on the desired voltage of the DC link.

Test Procedure

• The connections of the OP5707 to the OP8662 and to the OP8219 is demonstrated in figure 5. The connections must be performed as shown.

• The connections of the Festo 8857 inverter, OPAL-RT OP8662, and OPAL-RT OP8219 are illustrated in figure 6. The user must respect the direction and location of the measurement depicted the figure.

• Perform the control connections (PWM) between OPAL-RT OP8219 and Festo 8857 inverters as shown in figure 7 using the provided DB9 cables.

• Ensure that all power source outputs are off

• Connect the system power circuit and connection signals as shown in figures 5 to 7

• Powered on the OP8662.

• Ensure that the power adaptor is connected to the OP8219.

• Ensure that the Festo inverter modules 8857 are powered on using the 24 V AC voltage provided by the Festo power supply 8525.

• Ensure that the jumpers are always installed on the OPAL-RT OP8219 board. For all tests involved using OP8219, the jumpers need to be installed, unless otherwise stated.

• Make sure that the phase voltages of the grid are properly connected to a corresponding input terminal of the inverter (A-to-A, B-to-B, and C-to-C).
  The phases can be distinguished using an oscilloscope.
  A Mismatch between the sequence of the phases applied to the inverter leads to the trip of the inverter when the GSC controller is activated.

• Launch RT-LAB.

• Import the model zip file (see below) in RT-LAB.

• Build, load, and execute the model.

• Ensure the Lab volt power supply unit 8525 is powered on and the voltmeter’s selection knob is set to AC 4-5.

• Ensure the 8509 resistive load is switched off.

• Increase the variable voltage knob to set the AC line voltage level to 55 Vrms.

• Select the source or “Reference Control” (figure 12):

  • 1: The model will run a simulation of a DC-bus control.

  • 3: The model will control the Festo hardware to regulate a DC-bus.

• The inverter DC link reference for the inverter is set to ’110’ as shown in figure 13.

• Enable the PWM signal for the 3-phase inverter module that is being tested, by using the toggle switch from ’0’ to ’1’.

• If the user has set a DC link reference to 110 V and the supply voltage is 55 V; the following start-up results would be seen in the oscilloscope when the PWM signal is enabled.

• Connect a resistive load of 240 Ω using the related switch.

• The following results would be seen in the oscilloscope when the 120 Ω resistor is connected in parallel to the 240 Ω one, which leads to the drop of the total DC load to 80 Ω.

• To stop the model:

  • Disable the PWMs for the 3-phase converter that is being tested, by using the toggle switch from ’1’ to ’0’.

  • Turn the variable voltage knob to ‘0 V’.

  • Turn off the Festo 8525, OPAL-RT OP8660, OPAL-RT OP8219, and resistive loads.

  • Reset the model in RT-LAB.

Conclusion

Based on the preceding tests, the hardware and software included in Festo models are declared fully functional and compliant with OPAL-RT specifications.

Model (Zip File)