System Verification

Offset calibration of OP8660’s voltage and current (VI) channels.

The high current and voltage sensors of the OP8660 module take between 10 to 15 minutes to reach their steady-state operating point after the module has been turned on. Humidity and room temperature variations, as well as relocating or physically reorienting the OP8660 module may (marginally) affect the readings of the current and voltage channels. In this section, the user is presented with the option of calibrating to zero the voltage and current channels of the OP8660 using a SIMULINK-based model (i.e., software calibration). The user may include this procedure in their own developed models and run it every time an offset drift in the OP8660 readings is suspected.

Procedure

1. Connect the OPAL-RT simulator to the OP8660 as shown in section 1.
2. Connect the OPAL-RT simulator with the host computer as shown in section 2.
3. Import project zip into RTLAB
4. Make sure no voltage or current input is connected to the OP8660 channels. Figure 4.1 presents the SIMULINK console generated by RT-LAB. Two pairs of numeric displays show the voltage and current lectures of the 8660, one pair corresponds to the un-calibrated data, and the other corresponds to the calibrated data. During the first execution, both pairs of displays show the same readings since no calibration has been
5. Activate the toggle switch in the console. Notice now from Figure 4.2, that the calibrated data displays a zero or very close to zero offset. The calibration offsets for both current and voltage channels are kept in a 32-element array named AnalogCalibrationV2 contained in the *.mat file of the same name. Every time the toggle switch is activated the calibration offsets are updated in the *.mat file.

Screenshot of the SIMULINK console for VI_8660_OFFSET_CALIBRATION_v2_1.mdl before activating the VI calibration.

Screenshot of the SIMULINK console for VI_8660_OFFSET_CALIBRATION_v2_1.mdl after toggling the VI calibration.

Functional verification of the Digital IO’s in the OPAL-RT simulator through the OP8660 module Users can verify the correct operation of the OPAL-RT simulator’s Digital IOs which are accessible through the OP8660 The verification strategy consists of establishing a loopback connection between the input and output channels of the OP8660: digital signal is sent through a given digital output port and then read back through a digital input port.

Procedure

1. Connect the simulator to the OP8660 as shown in section 1.
2. Connect the simulator with the host computer as shown in section 2.
3. Connect in a loop-back fashion the first Digital IOs of the 8660 module as shown in Figure 4.3, i.e., DI0(-) ↔ DO0(-) and DI0(+) ↔ DO0(+).
4. Eventually, repeat this loop-back connection for the remaining Digital IOs.
5. Import project “INTEGRATION_OP4510_OP8660.zip” in RT-LAB

Figure 4 presents the SIMULINK console generated by RT-LAB while executing OP4510_LABVOLT_CPU.slx. Inside subsystem “OP8660 DI DO CH0-7” there are manual switches to change the state of Dout 0-7 whose state can be monitored (thanks to the loopback) through the displays that show the Din 0-7.

Screenshot of the SIMULINK console for OP8660_AI_AO_v2_1.mdl upon execution.