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| Controller Name | Bind this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block The OpCtrl block controls initialization of the settings of one specific FPGA in the system. |
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| DataOut port number | Set the number of the DataOut port to be controlled by this block, in the range [1:64] for the VC707, TE0741 and TE0741 OP48xx FPGAs and [1:32] for all others. |
| Slot infos | This non-editable parameter displays the physical location of the digital input channels related to the selected DataOut port, as obtained from the parsing of the configuration file. |
| Available channels | This non-editable parameter specifies the maximum number of PWM lines supported by the DataOut port as defined in the RT-XSG bitstream. |
| Number of PWM lines | Set the number of PWM channels to be used by the block. The value must be less than or equal to the value of the 'Available channels' parameter. Only the first channels will be measured by the block. |
| Sample time (s) | This parameter allows the user to specify the block sample time in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem) while -1 specifies an inherited sample time. A functionality block and its associated controller block must execute at the same sample time. |
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