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- Operate as an IEEE1588 master or an IEEE1588 slave node
- Supports IEEE-1588-2002 (PTP V1) and IEEE-1588-2008 (PTP V2)
- Supports all standard profiles:
- Default (IEEE1588-2008 Annex J.3)
- Default P2P (IEEE1588-2008 Annex J.4)
- Power (C37.238 2011)
- Power S (C37.238 2011 slave only)
- Power 2 (C37.238 2014) - only supported on 32-bit Linux platforms (x86)
- Power 2 S (C37.238 2011 2014 slave only) - only supported on 32-bit Linux platforms (x86)
- C37.238 2017 - not supported on 32-bit Linux platforms (x86)
- C37.238 2017 - not supported on 32-bit Linux platforms (x86)
- SMTPE (ST 2059-2)
- SMTPE S (ST 2059-2 slave only)
- Telecom (G.8265.1 master only)
- Telecom2 (G.8275.1)
- Telecom2 S (G.8275.1 slave only)
- gPTP (IEEE 802.1AS-2001)
- gPTP S (IEEE 802.1AS-2001 slave only)
- Generate demodulated IRIG-B or 1PPS signal to synchronize external devices
- Can be synchronized by an external IRIG-B or 1PPS signal
- Implements best-master-algorithm defined in the IEEE1588 standard based on the configurable priority
- Supports virtual LANs (VLAN)
- Supports peer-to-peer and end-to-end delay mechanisms
- Starts the simulation aligned to the 1PPS reference (next second change)
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Hardware | The only supported hardware for the moment is the Oregano Syn1588 PCIe card. |
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Enable verbose mode | If set to "true", additional information will be displayed on the RT-LAB monitor during the load of the model |
Synchronization mode | Select if the card will be synchronized from PTP, IRIG-B, or 1PPS. When configured in PTP mode, the driver can operate as a PTP master or a PTP, slave. The operation mode depends on the selected PTP profile and priority. When configured in IRIG-B or 1 PPS mode, the driver will expect to receive a valid signal on the external SMA connector. In this mode, the driver can also operate as a PTP master to synchronize other PTP slaves on the network. |
Generate sync signal | This option is only available when the external synchronization mode is PTP. When operating in PTP mode, the external SMA connector can be used to generate a,1 PPS or an IRIG-B signal. |
Wait for next second | When enabled, the beginning of the simulation will be delayed until the next second change. The rising edge of the synchronization signal will be aligned with the rising edge of the 1 PPS signal in either PTP, IRIG-B or 1 PPS mode. If this parameter is disabled, the simulation can begin in the middle of a second. |
Wait for synchronization timeout (seconds) | The synchronization process will begin once the model is loaded but the simulation will not begin until the timeout configured by this parameter has expired. This parameter should be tuned to make sure the simulation is started with a good synchronization with the external source. To begin the simulation immediately after the model is loaded, set this parameter to zero. |
Network interface | This field is not mandatory, it can be left blank or set to "auto" to allow the software to automatically discover the network interface. Otherwise, this parameter must match with the network interface name of the IEEE1588 compatible hardware. An error will be displayed at load time in case that the network interface is not supporting PTP. |
PTP profile | Select the PTP profile that matches your architecture. A PTP profile specifies a preset of IEEE1588 configurations and operation mode. For more information, please consult the IEEE 1588-2008 standard. Possible options are Default, P2P default, Power, Power slave, Power2, Power2 slave, C37 238 2017, C37 238 2017 slave, SMPTE, SMPTE slave, Telecom master, Telecom 2, Telecom 2 slave, gPTP, gPTP slave |
Delay mechanism | The mechanism used to calculate the delays incurred during the propagation of the packets across the network. Possible options are peer-to-peer and end-to-end. |
Use VLAN | Select this option if the synchronization hardware is connected to a VLAN. In this case, the VLAN identifier needs to be specified. |
Priority | The value chosen for the priority will be taken into account by the Best Master Clock Algorithm (BMCA). A lower value means a higher priority. If the IEEE1588 card is operating in master mode and another device with a higher priority appears, on the network, the simulator will become a slave. |
Advanced options | The Oregano Syn1588 PCIe card has the possibility to handle very specialized configurations. This field is there to open custom configurations in case it is required for some customers. This field should only be used by advanced users or with the help of Opal-RT's support team. |
Time offset (s) | The time offset to apply on the timestamp read from the hardware, expressed in seconds. This parameter accepts values with precision up to the nanosecond. If set to an non null value, the driver will output the original time as well as the shifted timestamp. If the clock is not well synchronized (timestamp starting at 0 seconds) the original clock may be compensated to avoid a negative shifted timestamp. |
Apply this configuration automatically next time the system boots | If enabled, the card will be configured by an OS service launched at boot time. This will provide a stabilized offset with the Grandmaster clock at the beginning of the simulation. This feature is not supported on 32-bit Linux platforms (x86). |
Enable virtual mode | In virtual mode, the model can be executed even if this I/O interface is not compatible with the hardware configuration of the system. The connections between the model and the I/O interface will be done during the initialization, but the I/O interface will not do anything. The virtual mode can be used to troubleshoot problems on a system without having the required hardware, or to prepare a model with different I/O interfaces even if the final hardware platform is not available. |
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