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Jean-Nicolas Brunet

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The CIGRE Interface block allows users to integrate the code of a controller based on the recommendations of the IEEE/CIGRE B4.82 working group which allows to standardise the integration of real manufacturer code in simulation software. To do so, the controller must be provided as a “.dll” file which follows the API proposed by the working group (

View file
nameIEEE_Cigre_DLL_Standard__V1.1_Method_rev3_Clean.pdf
).

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Note

In its current state, the CIGRE Interface block only supports Windows (.dll) libraries. This means that this component will not work on real-time targets. If a real-time compliant CIGRE library (.so) has to be included in the model, please contact OPAL-RT support team.

Workflow

The interface block workflow is quite different from most blocks in HYPERSIM.

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  • Unit: Unit

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Name

Description

Unit

Variable = {Possible Values}

Expected performance

This parameter helps HYPERSIM Task Manager | Summary and Preferences to assign the task containing the CIGRE interface block to a RT core. It should be set to an approximation of the computational time taken by the block to execute the CIGRE block.

Note

This parameter do does not take into account the performance factor of the target running the mode.target’s processor performance. This value will therefore be divided by the selected target’s processor performance during the next task mapping.

Example : if the expected performance is 40us, and then current target processor performance is 20, then during the task mapping the block will be estimated at 40/20 = 2us

microseconds

Inputs, Outputs and Signals Available for Monitoring

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