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| ControllerName | Bind this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block The OpCtrl block controls initialization of the settings of one specific FPGA in the system. | ||||||
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| DataIn port number | Enter the index of the DataIn port to be controlled by this block, in the range [1:64] for the VC707, TE0741 and TE0741 OP48xx FPGAs and [1:32] for all others. | ||||||
| Slot infos | This non-editable parameter displays the physical location of the digital output channels related to the selected DataIn port, as obtained from the parsing of the configuration file. | ||||||
| Maximum number of PWM signals controlled by this block | This non-editable parameter displays the number of channels in one sub-section listed in the configuration file. | ||||||
| Number of PWM signals | Enter the number of independent PWM signals, or the number of pairs of complementary PWM signals, which will output from the specified digital module. The value of the number of signals must be less than or equal to the value of the 'Maximum number of PWM generators' parameter. This number always equals to the length of the two vectors for the input of this block (Hz and Duty cycle, see the Inputs Section below for more details). The data supplied by the block will thus apply to the N first channels of the sub-section, where N is the value of the 'Number of PWMOut channels' parameter. When 'Complementary mode was selected, the maximum number is divided by 2. In the 'Complementary Mode', the complementary signal is generated on the next PWM channel as shown in Figure 2: Complementary Waveform. | ||||||
| Polarity | This parameter is used to specify the PWM signal polarity. The polarity can be either Active-High (default) or Active-Low. ‘Active-Low’ means that a ‘Low’ output voltage is interpreted as a ‘1’ and a ‘High’ input voltage is interpreted as a ‘0’. ‘Active-High’ for this parameter means that the signal is active-high (default), which means that a ‘Low’ input voltage is interpreted as a ‘0’ and a ‘High’ input voltage is interpreted as a ‘1’. In 'Complementary Mode', when a 'Deadtime value' is set and 'Polarity' is 'Active Low', the PWM signal is set to '1' during the delay specified by the 'Dead Time value' parameter;when 'Polarity' is 'Active High', the PWM signal is set to '0'. | ||||||
| Carrier wave mode | This parameter sets the PWM generation pattern. If the generation mode is set to ‘Symmetric’, the PWM carrier is a triangular waveform. An ‘Asymmetric’ generation mode corresponds to a sawtoothed carrier waveform. As a result, the symmetric PWM active phase is symmetric to the beginning of the PWM period while the asymmetric PWM active phase is asymmetric to the beginning of the PWM period. | ||||||
| Carrier phase control from an input | When selected, an extra input Phase is added to the block (refer to section Inputs) to allow the update of initial phase in real time.
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| Dead-time control from an input | When selected, an extra input Dead time is added to the block (refer to section Inputs) to allow the update of dead time in real time. Note that this option is available when Output complementary channel is set.
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| Allow disabling channel | When selected, an extra input Disable is added to the block (refer to section Inputs), to allow disabling channels in real time. | ||||||
| Output complementary channel | When selected, the PWM block generates the complementary signal and the number of PWM channels is divided per 2. The other channels are used to generate the complementary PWM signal according to Figure 2 below.
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Dead time value (seconds) |
This parameter is available only if a complementary waveform is requested. It corresponds of the duration of this dead time, The duration is expressed in seconds. Note that the inclusion of a dead time will reduce the length of the active phase of the two complementary waveforms, thus reducing the duty cycle. This value is in seconds. When 'Polarity' is 'Active Low', the PWM signal is set to '1' during the delay specified by the 'Dead Time value' parameter and if 'Polarity' is 'Active High', the PWM signal is set to '0'. The dead time range is between [0.01, 10,.23] us.
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Initial phase [0..1] | This parameter is used to specify the phase between each PWM signal and the carrier wave. Then, it is a vector (1 x n) where n is the number of PWM signals generated. The initial phase of the carrier is expressed as a cycle ratio, between 0 and 1. It is quantized to the nearest 1/1000. |
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| Hz | This input sets the PWM carrier frequency. The value should be provided in Hz; it should be between 0 and 180,000 Hz for bitstreams generated with RT-XSG version up to v3.3.3. After this version, the limit for the maximum frequency will depend on the hardware used in the system. |
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| Duty | This input is the duty cycle. Its should be inside the [0,1] range. When the value is out of range, the duty cycle is saturated. |
| Dead time | This input is available only if a complementary waveform is requested and the Dead-time control from an input is set. It is equivalent to the Dead time value parameter for real time. The value should be provided in seconds. The dead time range is duration is expressed in seconds but the range is between [0.01, 10,.23] us. |
| Phase | This input is available if Carrier phase control from an input is set. It is used to specify the phase between each PWM signal and the carrier wave. Its should be inside the [0,1] range. When the value is out of range, the phase cycle is saturated. |
| Disable | This input is available if Allow disabling channel is set. It is used to disable channels in real time. The input is an array with the size mentioned in Number of PWM signals. If Output complementary channel is set, an element of this array will control both the channel and its complementary output. The duty cycle of both physical channels (the PWM generator and its complementary) will be set according to the polarity chosen (i.e. 0 for active high polarity and 1 for active low polarity). |
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