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changes.mady.by.user Sylvain Ménard

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Model name

6-bus transmission system with I/Os

Highlights

Typical applications can be run using the most cost-effective HXG Basic license

Model diagram


Single-phase nodes

18

Sources (3φ)

2

Transformers (3φ)

2

Single-circuit lines (3φ, Bergeron model)

1

RLC (3φ)

5

Breakers and fault (3φ)

2 + 1 = 3

Hardware

OP5707XG

  • Motherboard: SuperMicro X11DPL-i
  • Processor: Intel(R) Xeon(R) CPU @ 3.80GHz; 8 cores
  • RAM: 32 GB

Software

  • Platform: HYPERSIM
  • Compiler: Intel 2019 (19.03.199)

Minimum license required

HXG Basic (1 core, 30 nodes)

Results

  • Number of core(s): 1
  • Minimum time-step: 5 us *
  • Total average execution time: 0.67 us

* Performance under transient conditions varying considerably depending on the study type, this benchmark measures the minimum achievable time-step without overruns in steady-state conditions. A rule of thumb is to consider 10 to 20 % buffer time for calculations under transient conditions.

Benchmark

Performance comparison between new (OP5707XG) and previous (OP5700) hardware generations

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