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The OP48H10 I/O module provides 32 configurable digital inputs or outputs, 16 fast analog inputs and 16 fast analog outputs with sample rates up to 10 MSPS for measuring input signals up to ±10 V.


This card is only compatible with OP4800 series of devices. See the hardware platform compatibility chart for more information.

Main Features

  • 32 digital input/output channels divided in 4 banks of 8 channels, each bank being configurable as inputs or outputs by software, TTL 3.3/5 V

  • 16 analog inputs at 5 MSPS simultaneous sampling, ± 10 V, 16-bit resolution

  • 16 analog outputs at 10 MSPS simultaneous sampling, ± 10 V, 16-bit resolution

  • Factory-calibrated

Digital Input-Output Description

There are 32 digital IOs that are sampled/generated simultaneously up to 50 Mb25 Mb/s. They are divided in 4 groups of 8. Each group can be configurable in direction through software. Also, the voltage of each group can be configurable independently for 3.3V-LVTTL or 5V-TTL.

Each channel implements the circuit shown below:


 TTL signals are not recommended for long-distance data transmission. We recommend using this board with cable lengths no longer than 1.5 meters (5 ft). When using longer lengths, OPAL-RT recommends terminating the lines to avoid over/undershoots. The OP8320 can help to implement the termination. Also, refer to Simulator EMC cable recommendations to design a cable that meets required performance.

Analog Input Description

Each channel uses a 16-bit resolution analog-to-digital (ADC) converter. Each ADC can sample up to 5 MS/s, all channels being simultaneously sampled. 

The figure below represents a simplified schematic of the input stage. The first filter removes excessive noise. The signal is then attenuated to bring the voltage within the range required by the ADC converter. The input can be used single-ended (±10 V) with the AIN_N being connected to GND or can be used in fully differential mode (±10 V-diff) with a ±5 V common-mode rejection.

Factory calibration is done only in single-ended mode.

Analog Output Description

Each channel uses a 16-bit resolution digital-to-analog (DAC) converter. Each DAC can generate up to 10 MS/s, all channels being simultaneously generated. 

The figure below represents a simplified schematic of the ±10 V output stage. The filter cut at 10 MHz and the output is optimized to have a fast step response while reducing the noise. The output is stable for a wide variety of load, including capacitive load up to 20 nF.


  • The card is factory-calibrated to ensure accurate output values with a maximum of ±10 mV absolute error.


To ensure the ±10 mV precision, a warm-up time of 5 minutes is necessary.