Block
Mask
Description
The block OpFcnOP5142EX1 LoadOut is used to read registers of Opal-RT OP5142 card. The access to FPGA register is used to retrieve specific data from FPGA. It takes more time than DataOut Recv and should be used ponctually.
One OpFcnOP5142EX1 LoadOut block controls data reception from one of the LoadOut ports of the bitstream programmed in the OP5142 card. The OP5142-EX1 bitstream must be produced with Opal-RT RT-XSG product, version 2.0 or higher.
In the OP5142-EX1 implementation of the OP5142 support, the OP5142 bitstreams have 32 LoadOut output ports. Each port has a maximum width of 250 32-bit data words. These data ports are used to exchange data between the RT-LAB model and the FPGA chip of the OP5142 via the PCIe bus of the target computer.
Parameters
| Controller Name | Bind this block to an OpCtrl OP5142EX1 block by entering the same 'Controller Name' as specified in the OpCtrl OP5142EX1 block The OpCtrl OP5142EX1 block controls initialization of the settings of one specific OP5142 card in the system. |
|---|---|
| LoadOut port number | Enter the number of the LoadOut port to be controlled by this block, in the range [1:32]. |
| Data outport width | Enter the maximum number of data words that will be received from the OP5142 at each calculation step, in the range [1:250]. |
| Data outport type | Select the data outport type: uint32 or double. When double is selected, the underlying driver performs data typecast between double and uint32, so data values are limited to the range [0:2^32-1]. The possibility to set the outport to uint32 type is provided for optimum performances |
| Sample Time (s) | This parameter allows the user to specify the block sample time in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem) while -1 specifies an inherited sample time. The OpFcnOP5142EX1 LoadOut block and its associated OpCtrl OP5142EX1 block must execute at the same sample time. |
Inputs
The block has one inport.
Enable: This input is used to trigger data reading from OP5142 FPGA card. When this input is set to 1, Data outport will be updated with data from OP5142 FPGA registers.
Outputs
The block has two outports.
| Data | The data values returned by this outport are read from OP5142 FPGA registers when Enable is set. No scaling or formatting of the data is performed, except for typecast from uint32 to double if the Data outport type parameter is set to double. |
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| Status | The Status output returns the following values: |
| Value | Description |
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| 0 | No error. |
| -1 | Block could not be matched with an OpCtrl OP5142EX1 block (check the 'controller Name' value), or OP5142 card initialization problem. |
| -2 | Data reception timeout. This error can be caused by model synchronization errors. |
Characteristics and Limitations
This block has no special characteristics.
| Direct Feedthrough | No |
|---|---|
| Discrete sample time | Yes |
| XHP support | Yes |
| Work offline | No |