Block
Mask
Description
The OpIEC61850MergingUnit block represents a merging unit in an IEC 61850 architecture. The logical device so-called Merging Unit (MU) performs a time coherent combination of the current and/or voltage data. The MU contains the Logical Nodes TVTR (voltage transformer) and TCTR (current transformer). It combines the currents and voltages from three phases, and additionally also the neutral currents and voltages in one dataset for transmission with the Sampled Value service to all subscribing Intelligent Electronic Devices (IED).
This version of merging unit follows the recommendations of the UCA International Users Group, published in the user convention IEC 61850-9-2LE (See the documentation Implementation_Guideline_for_Digital_Interface_IEC_61850). Mainly, the SV data set is composed of 4 CT/VT transmitted using 80 or 256 samples per cycle.
The block input data is computed and sent on the network by a driver application that runs at a frequency determined by the sample rate and the nominal frequency of the block.
Parameters
Ethernet Adapter | Specifies the name of the Ethernet adapter interface (string, 64 characters max.). To verify which ethernet devices are available on a RedHat system, issue the following command: # ifconfig A list of available network interfaces is printed. Report in this field, the name of the network interface to be used by this merging unit. |
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LDName | Specifies the system-wide unique identifier (string, 10 characters min., 35 characters max.). The user convention IEC 61850-9-2LE recommends using the following format ‘xxxxMUnn’ where xxxx is the concatenation of the substation name, voltage level and bay and where nn identifies the measuring point. |
MAC Address | Specifies the MAC multicast destination address where the sampled values will be published (e.g. '01-0C-CD-04-00-00'). The MAC address must respect the following format 'hh-hh-hh-hh-hh-hh', where h is an hexadecimal digit. |
Sampling Rate | Specifies the number of samples transmitted per cycle. |
Nominal Frequency | Specifies the power system frequency. |
Extrapolation | Specifies the extrapolation method the driver applies to estimate the block input value at a precise time. Each MergingUnit block has a 50-element circular buffer. During each calculation step, it fills up one entry. Depending on the extrapolation method, the driver uses a number of known values from the circular buffer and predicts the block input value that will be sent on the network at that moment. |
Clock | Specifies the clock of MergingUnit . If the opation of "External Clock" is selected, the MergingUnit will be synchronized with an external clock that receives in the clock input field. Otherwise, the block uses internal clock of the system. This option allows us to use Spectracom TSync PCIe board along with MergingUnit block to syncronize the time with GPS instead of system time. |
Inputs
Four input vectors, V, I , QA and Stop, are used to specify the sampled values to be multicasted during the Run phase of the model. The fifth input clock only appears in the block if the External Clock is selected in the mask
The 2 vectors V and I, [Va, Vb, Vc, Vn] and [Ia, Ib, Ic, In], are respectively 3 phase voltages/currents and neutral voltage/current.
The QA is a 8-element vector used to input the quality attributes of the voltage/current dataset [QVa, QVb, QVc, QVn, QIa, QIb,QIc,QIn]. Each element represents a 16-bit value. The signification of each bit is described in the following array:
Bit | Attribute Name | Attibute Value | Value | Default Value |
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0-1 | Validity | Good | 0 0 | 0 0 |
Invalid | 0 1 | |||
Reserved | 1 0 | |||
Questionable | 1 1 | |||
2 | Overflow | TRUE | FALSE | |
3 | Out of range | TRUE | FALSE | |
4 | Bad reference | TRUE | FALSE | |
5 | Oscillatory | TRUE | FALSE | |
6 | Failure | TRUE | FALSE | |
7 | Old data | TRUE | FALSE | |
8 | Inconsistent | TRUE | FALSE | |
9 | Inaccurate | TRUE | FALSE | |
10 | Source | Process | 0 | 0 |
Substituted | 1 | |||
11 | Test | TRUE | FALSE | |
12 | Operator blocked | TRUE | FALSE | |
13 | Derived | TRUE | FALSE |
The Stop input is a flag enabling the transmission of sampled values per nominal line cycle (1: disabled, 0:enabled).
If the mask parameter "External Clock" is selected, the clock input should receive external clock signals. This input will accept a 2-element vector. The first vector is the second increment, it can be replaced by the epoch time (the number of second elapsed since first January 1970) output of Spectracom block. It means that this signal has to increment at each second.
The MergingUnit uses this signal to set the attribute "SmpCnt" in SV messages. The second vector must be a binary value (0 or 1) that represents the synchronization state of the external clock. If the timestamp is synchronized with an accurate external source such as a GPS, the value applied to this signal should be set to 1 and otherwise, it should be 0. This value will appear in the "SmpSynch" attribute of SV messages. Ideally, the timestamp input should come from an accurate synchronization source.
The MergingUnit has been validated with a GPS synchronized Spectracom TSync PCIe card. A control block for this card is available in RT-LAB and it provides the signals required by the MergingUnit.
Outputs
This block has one output which is the error status: Err.
It may return the following values:
0 | The block completed the send operation successfully. |
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-1 | The driver didn't initialize properly. |
-2 | The block stop input flag is enabled. |
-3 | The send operation could not be completed (error returned by the Ethernet driver). |
-14 | Could not communicate with the interface specified by the Ethernet adapter parameter. |
Characteristics and Limitations
All MergingUnit blocks in a model must run at the same nominal frequency.
Direct Feedthrough | No |
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Discrete sample time | No |
XHP support | Yes |
Work offline | No |