Each sensor required to close the loop with the controller is required to be mapped on an output channel of the simulator. To do so, the user must use the Analog Outputs Mapping and Rescaling (AOMR) feature of the machine model.
Analog Out Mapping Rescaling
The AOMR feature is used to assign measurement of the circuit to the analog outputs of the simulator. It can also be used to rescale and calibrate measurement before sending them on outputs.
This feature is achieved via an internal mapping engine within the FPGA. In order to use this feature, the RT-LAB model must contain a communication block within the Master Subsystem and a configuration block within the Console subsystem.
Each AOMR module is capable of mapping the FPGA internal signals to up to 32 analog output channels, or two analog output hardware module.
Master Subsystem
First step is to add an “Aout_Mapping&Adjustments” block inside the RT-LAB model. This block is used to configure the FPGA AOMR module.
The main AOMR block contains the following parameters:
- Number of Channels: either 16 or 32 depending on the number of analog output mezzanines that are driven by the AOMR module. Refer to the firmware documentation (Figure 63) to know this setting.
- Number of Aout User Signals: This is the number of signals that are going to be sent directly from the RT-LAB CPU model to the FPGA (For example, temperature sensor are usually emulated using signals coming from the CPU model since the dynamic of these does not require FPGA simulation). These signals will be then available to be connected to the analog output channels. The value of this parameter must match the size of the user_aout input signal of the block.
- Block Index / Data In / Load In Port Number: Refer to the firmware documentation (Figure 63) to find the Block Index, DataIn & LoadIn port numbers
- Controller Name: Name of the OpCtrl block inside the Master subsystem. This value can usually be left in its default state.
Changing Block Index to a different value, would lead the functionality to be broken. Leave to 0 unless specified otherwise in the firmware documentation.
Console Subsystem
This block provides an interface to make the signal assignation, as well as tuning the gain, offset and saturation parameters for each analog output channel.
To being able to change the AOMR configuration on the fly from the host computer during simulation, The Analog Output Mapping and Rescaling Control Panel block must be placed inside the console CPU subsystem. When the calibration is all done, and the analog output channels assignation is steady, this block can also be moved to the master subsystem.
The AOMR Console interface has several configuration tabs. The first tab contains general configuration parameters while the proceeding tabs contain configuration parameter for each analog output channel.
In the case of Machine models with eHSx128 Gen3S, the form factor x128 with Custom must be selected from the available options. Otherwise, in the case of Machine models with eHSx64 or eHSx32 Gen3, the form factor Custom must be selected. The list of signals is provided within the firmware documentation is pre-filled in the examples provided with the eFPGASIM installer.
The “signal names” setting must be filled with a Matlab cell of strings that contains the list of signals assignable to any of the analog output channels. This information is available in the firmware documentation (Figure 66).
Each channel has the following options:
- Signal: Signal that is going to be outputted on the analog output channel. The values available in this drop-down control are the resolver signals and the eHS circuit measurements.
- Gain: Gain applied to the signal for this channel
- Offset: Offset applied to the signal for this channel
- Max: Maximum value for the signal on the channel
- Min: Minimum value for the signal on the channel
Note: In the FPGA, the gain is applied before the offset, and the saturation Min/Max values after the offset and gain:
- Aout_V = max( MinValue, min (MaxValue, Signal * Gain + Offset) )
Resolver Signal Assignation
Introduction
Resolvers are often interfaced with Analog Outputs so that they can be used with an external ECU or DUT. This section explains how to configure and use the resolver’s signals.
Configuration of Resolver Parameters
The configuration of the resolver parameters is done inside the Master Subsystem with DualAngleSensors_wFault block which is part of the eFPGASIM library.
To work properly, the communication settings of block must be configured as described in the firmware documentation.
This block has several resolver parameters to configure:
- the pole pair number of the resolver
- the offset angle
- Sine and Cosine transformer ratio (can also be used in order to apply faults)
Make sure to refer to the block help to get more details about each parameters.
To close the loop properly with an external ECU, the resolver parameters need to be tuned according to the real sensor device specifications.
Note: To know the location of the analog input channels reserved for the resolver external excitation, please refer to the firmware documentation.
Resolver Signal Assignation
The Analog Mapping Rescaling Output feature is used to map the resolver signals. Please refer to the relevant section of this document for more information.
To begin, open the Console Subsystem within the RT-Lab Real-Time model. Next, open the AOMR Control Panel to configure the mapping scheme which the resolvers will use.
For each resolver, the list of the available signal is the following:
- Sine: Sine component
- Cosine: Cosine component
- Excitation: Excitation signal used by the resolver
It is possible to map any signal to any analog outputs channel.
For differential Sine and Cosine resolver signals, the user can dedicate two analog output channels for each resolver signal, then assign a negative gain on the second channel to emulate the negative portion of the differential signal.
Note: For the resolver excitation, there is no need to dedicate two channels of analog input in case the excitation signal from the DUT is differential. The standard analog input I/O module from OPAL-RT are differential by nature, and the inverted signal can be plugged directly to the channel xx- corresponding to the channel xx+ used for the positive excitation signal.
Encoder Signal Assignation
Configuration of Encoder Parameters
The configuration of the encoder parameters is done inside the Master Subsystem with DualAngleSensors_wFault block which is part of the eFPGASIM library (the same block is also used for resolver tuning).
To work properly, the communication settings of a block must be configured as described in the firmware documentation.
This block has several encoder parameters to configure:
- the pole pair factor
- the angle offset
- the number of pulse per revolution
- the output signals polarity
- the “inverse speed” option (A lead B vs B lead A)
The block features are detailed within the help of the Simulink block.
To close the loop properly with an external ECU, the encoder parameters need to be tuned according to the real sensor device specifications.
Encoder Signal Location
The quadrature encoder sensor signals consist in 3 digital outputs signals A B and Z. These signals are pre-assigned in the firmware to dedicated Digital Ouput channels.
Note: To find out where the A B Z signals of each encoder are located on your simulator, please refer to the firmware documentation (Figure 71).
