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ARTEMiS GUIde (versions 7.5+)

Library

ARTEMiS

Blocks

Description

The ARTEMiS GUIde block is used to set and control general ARTEMiS and SSN simulation parameters and options [1].

Masks

Parameters

General tab

Sample Time (s): discretization sample time in seconds for ARTEMiS and SSN solvers.

Enable State-Space-Nodal method (SSN):  this parameter should be checked to use the SSN solvers and methods. When unchecked, legacy state-space ARTEMiS solver will be used. These legacy solvers (non-SSN) will be obsoleted in future versions. Note that the SSN solver is used even when there is no nodes (Nodal Interface Blocks or NIB) in the model.

SSN option tab

SSN Solver:  discretization method of the SSN algorithm.  Available solvers are:

Backward Euler: most stable solve of all, L-stable, order 1 (less precise than Trapezoidal)

Trapezoidal: classic trapezoidal (A-stable, order 2), prone to oscillations

Art5: order 5 L-stable solver with linear interpolation of the nodal interface voltage between the previous solution voltage and the current voltage solution.

Art5 with Backward-Euler Nodal Interface: same as Art5 but with fully implicit voltage solution. Often more stable than Art5 solver.

Art5 with balanced zero order hold Nodal Interface: same as Art5 but consider the nodal voltage solution as 2 half-steps (between previous step and current step) of constant value during nodal solution. Provided for challenging cases where other solvers would fail.

This discretization applies only to the main SSN network and does not apply to UCB blocks which have their own local discretization normally. sample time in seconds for ARTEMiS and SSN solvers.

Iterations:  Selection of type of iterations. Options available are:

iSWITCH and iMOV only (default): in this standard iteration scheme, only the iSWITCH and iMOV are iterated while regular SSN groups are not. This is the faster option.

iSWITCH, iMOV and SSN group internal group iterations: Here, SSN groups are allowed to iterate internally without global admittance matrix refactorization, which sometimes increase the accuracy while limiting the cost of calculations

Global Iterations (slower): In this option, the complete SSN solution, including the global admittance matrix solution is iterated when required. Note than UCB blocks do not iterate.

Maximum number of iterations:  the maximum number of iterations for all iteration options.

Nodal factorization type: Option are:

LU (more robust): The standard LU factorization is used for the nodal admittance matrix of SSN.

LDLT (quicker): LDLT factorization is used. This option takes advantage of the symmetry of the nodal admittance matrix that often occurs in power system models. Note that LDLT cannot be

used with most SSN machine models because these models do not produce a symmetric admittance matrix. The method is a little more numerically sensitive than LU because of the symmetry assumption. Sometimes, it can happen that some models produce slightly unsymmetrical admittance even if it should be symmetric in theory (because of numerical round-off errors during inversion in SSN calculations for example).

Enable SSN node type verification: AI subroutine that allows SSN to analyze the V-type or I-type selection in the model and provide some suggestion.

Advanced tab

Extinction angle computation (individual thyristor only): modify the outputs of the individual thyristor blocks to provide the extinction delay from the last time step when the thyristor opens.

Use ARTEMiS transformer saturation method: Substitute the standard SPS transformer saturation method for the ARTEMiS one which use the core flux as a state variable. This in return allow the saturation to be computed accurately without algebraic loop.

Check SSN matrix conditioning: Press this button to obtain additional numerical analysis of the various SSN group with condition numbers. This will appear in the SSN group printout like this:

SSN group info
Group 1 : 5 states, 9 inputs, 15 outputs, 0 switches. 
Group 2 : 5 states, 9 inputs, 15 outputs, 0 switches.
Group 3 : 21 states, 6 inputs, 3 outputs, 0 switches.
Group 4 : 6 states, 6 inputs, 3 outputs, 0 switches.
Group 5 : 1 states, 3 inputs, 6 outputs, 1 switches.
Group 6 : 1 states, 3 inputs, 6 outputs, 1 switches.
Group 7 : 6 states, 22 inputs, 11 outputs, 6 switches. (WARNING: low Y rcond= 8.3326e-013 )
Group 8 : 6 states, 20 inputs, 10 outputs, 6 switches. (Y rcond= 5.5556e-008 )
Group 9 : 6 states, 20 inputs, 10 outputs, 6 switches. (Y rcond= 5.5556e-008 )
Group 10 : 6 states, 22 inputs, 11 outputs, 6 switches. (WARNING: low Y rcond= 8.3326e-013 )
Group 11 : 21 states, 9 inputs, 6 outputs, 3 switches. (Y rcond= 5.8525e-005 )
Group 12 : 21 states, 9 inputs, 6 outputs, 3 switches. (Y rcond= 5.8525e-005 )
Group 13 : 21 states, 9 inputs, 6 outputs, 3 switches. (Y rcond= 5.8525e-005 )
Group 14 : 21 states, 9 inputs, 6 outputs, 3 switches. (Y rcond= 5.8525e-005 )
Group 15 : 21 states, 9 inputs, 6 outputs, 3 switches. (Y rcond= 5.8525e-005 )
Group 16 : 21 states, 9 inputs, 6 outputs, 3 switches. (Y rcond= 5.8525e-005 )
SSN nodal matrix is of rank 19 (45.4294 % of zeros) (0 prefactorized col/rows)

The above case is taken from the 12-pulse HVDC demo with two 6-pulse valve groups having a problematic condition number. The actual demo was corrected using this information (The valve groups were all I-type interfaced with no ground reference originally).

References

[1] C. Dufour, J. Mahseredjian , J. Bélanger, “A Combined State-Space Nodal Method for the Simulation of Power System Transients”, IEEE Transactions on Power Delivery, Vol. 26, no. 2, April 2011 (ISSN 0885-8977), pp. 928-935


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