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This document describes the Keterex KX USB-910H SPI Controller block that allows an external SPI device, either a master or a slave, to read data from the model or write data to the model. Usage of this block requires a KX USB-910H adapter to be connected to a USB port of the target.

The block can operate as a master or as a slave. As described below, the master mode has additional configuration parameters.

The communication is handled by the asynchronous process that is responsible for the data exchange between the external device and the model. This asynchronous process is an independent executable that needs to be transferred to the target and is launched during model initialization. Although this asynchronous process code should cover most of the typical SPI read/write operations, it is the user responsibility to adapt it according to its application requirement. This file needs to be transferred to the target during model compilation as explained in the 'File transfer' section.

For more information on the KX USB-910H adapter or SPI communication, please refer to Keterex website.


General Parameters

Adapter IDIdentifies whichKX USB-910H adapter to control in the case where multiple adapters are present on the system. This ID must be 0 for the first adapter, 1 for the second adapter and so on.
ModeSpecifies the block operation mode (Master or Slave).
Output widthSpecifies the width of the output data port. If no output data is required, this field must be set to -1.
Slave-Select pinSpecifies the Slave-Select pin that will be asserted during the SPI data transfer.
SS active highInstructs the adapter to assert the Slave-Select pin-high during each transaction. Otherwise, the pin is asserted low.
LSB firstInstructs the adapter to transmit and receive all data byte least-significant-bit first. Otherwise, the most-significant-bit is transmitted/received first.
SCLK polarityInstructs the adapter to either idle the SCLK signal high(when configured as a master) or expect the SCLK to idle HIGH (when configured as a slave). Otherwise, SCLK idles low.
SCLK phaseInstructs the adapter to transition/sample MISO/MOSI on the leading edge of SCLK. Otherwise, MISO/MOSI transitions/samples of the trailing edge of SCLK.
Abort on errorInstructs the adapter to abort the operation if an expected value is incorrect.
Bit rate (kbps)Specifies the SPI bit-rate for the adapter during master transactions. It does not need to be set for slave operations. This parameter directly affects the SCLK signal frequency. The unit is in kilobits per second (kbps).
TMIN (us)Specifies the minimum time the Slave-Select signal must remain de-asserted between SPI transfers. The unit is in microseconds (us). The minimum value is2 us and the maximum value is 55 us.
TSU / THD (us)Specifies the minimum delay between asserting theSPI Slave-Select signal and generating the bit period (TSU) and delay between the last bit period and de-asserting the Slave-Select signal (THD). The unit is in microseconds (us). The minimum value is 2 us and the maximum value is 55 us.
Bytes per SSSpecifies the number of bytes to transmit per Slave-Select cycle. A master will de-assert and re-assert the Slave-Select pin after transferring this number of bytes.
Output modeSpecifies how the block output reacts to data reception. When operating in master mode, the SPI asynchronous process is always sending data values applied to the block inputs on the MOSI pin even if there is no slave device at the other end. Therefore, there is know wayto make the difference between the absence of a slave device or the presence of a slave device sending'0x00' bytes on the MISO pin. When 'Last value' is selected, the master will latch the last datavalues received from the slave device. In this mode, the restriction is that the slave device can onlytransfer non-null data since a '0x00' value is considered as the absence of a slave device. When 'Zero'is selected, the master will not latch the received data. The result is that when the slave device will send a byte to the master, it will by applied at the block output but will be driven back to zero after a short period of time. In this mode of operation, it is the user responsibility to establish a data validation mechanism (i.e the slave can always drive the first bit of the byte high and perform the detection within the model).
/SS Tri-States MISOWhen operating in SPI slave mode, this value instructs the adapter to tri-state the MISO pin when its assigned Slave-Select pin is de-asserted.
Executable name

Specifies the name of the executable file of the asynchronous application that handles the low-level communication transactions.

Note: at this time, the only precompiled executable available for SPI control is 'AsyncSPI'. The name should be placed between single quotes (').


Data readyThis input can be used to control the rate at which the data inputs are sampled.
Data inputData connected to this port will be transfered to the external SPI device. The width of this port determine how much bytes can be transfered during a single data transfer. It is important to note that this input can only transmit data in bytes format.


Status: This output is an 3-wide vector that contains status and error codes fromthe asynchronous process. Typically, error codes should be 0 and the status should oscillate between 0 and 2.The bus can be de-multiplexed as shown below:

0Data transmit error
1Rata receive error
2Data receive status

Data output: The data sent by the external SPI device will be applied to this output bus. The width of this bus is defined by the 'Output width' parameter described above. Additional bytes received during a single data transfer will be discarded.

File Transfer

As explained in the 'Description' section, the asynchronous process executable must be transferred to the target and compiled before loading the model. This is donethrough RT-LAB by settings the correct parameters in the 'File' pane of the model. If you have anyproblem with the file transfer, refer to the example model. Here is an example:

Characteristics and Limitations

Inputs: The block can only transmit 8 data bits per input, per single data transfer.

Outputs: If the block receives more bytes than the configured width of the output port during a single data transfer, additional data will be discarded.

Timing: If the data transferred between the slave and the master seems to be delayed or incorrect, a tuning of the TMIN/TSU/THD parameters might be required.

Configuration: The block configuration (SS pin, SS active high, LSB first, SCLK phase, SCLK polarity) must match the configuration of the external device.

Direct FeedthroughNo
Discrete sample timeNo
XHP supportNo
Work offlineNo

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