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RT-LAB | Release Notes 2023.2

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RT-LAB 2023.2.1

Added

  • Added support for MIL1553 PCIe

  • Added support for MIL1553 new firmware

RT-LAB 2023.2

Software Toolboxes Installed with RT-LAB

Toolbox

Version

Toolbox

Version

ARTEMiS

7.7.4

ePHASORSIM

2023.2

eHS

2.14

RT-EVENTS

4.7.4

RT-XSG

3.3.6

MMC

2.9

Added

  • Added support for MATLAB/Simulink R2022b and R2023a for RT-LAB and all toolboxes except RT-XSG which depends on Xilinx/AMD Vivado support of MATLAB, now at R2022a

  • Added support for Python 3.9 and 3.10

  • Added support for LabVIEW 2023 Q1

  • Dashboards: Added support for copy-pasting widgets

  • FMU: Added support for Boolean variable type in Orchestra

  • Added an option to compile "for maximum compatibility" to allow loading a model without rebuilding it when changing workstation

  • DIB: Allowed the use of Simulink OpDilInterface blockset without having to connect any input or output to it

  • DIB: Allowed the use of the TCP/UDP I/O in conjunction with the OpDilInterface blockset

Improved

  • Improved warning to inform the user that the FMU timestep is default to 1s and this timestep can be changed via the timeStepNs option in the json file

  • Improved the precedence management when the compiling manual option conflicts with the default options.

Fixed

  • Dashboards: Fixed a bug in the synchronization with RT-LAB

  • Application Server : Fixed compatibility overwrite issue upon installation

  • Fixed Import and Export Connections Python 3 incompatibility

  • Fixed real time execution mode for dynamic_acq example model

  • Fixed issue with the FPGA scope process not being migrated to the correct CPU core

  • Fixed loss of connection issue of the FPGA scope with long simulations

Removed

  • Removed support for MATLAB/Simulink R2018a, R2019a, R2019b for RT-LAB and all the toolboxes except RT-XSG

  • Removed support for Windows 7, 8 and VISTA host operating system

  • Removed support for CentOS 7 target operating system

  • Removed GetActiveModels API function and replaced it with GetActiveProjects

  • Removed OpEndianSwapper Simulink block

  • Removed "Macro recorder" feature

  • Removed OpPythonSFunction Simulink block

I/O Interfaces

ARINC 429

  • Fixed issue with BNR data when the value was less than the minimum configured value

Bluestorm

  • Fixed support for 32 channels using two Bluestorm BEG006 cards

CAN

  • Fixed support of the DLC when importing a DBC file

EtherCAT

  • Added support for Eurodrive MDX91A device

  • Fixed model crash with more than 20 connections in both directions

  • Fixed multi-model support

IEC 60870-5-104

  • Fixed issue with loading models when used with Dolphin interconnect

OPC-UA

  • Fixed issue with TCP servers not attaching to the configured interfaces

  • Fixed publish paths and allowed multiple datapoint names in different subfolders

TCP/UDP

  • Fixed issue with float and double-bit precision data types

Phasor-Domain Simulation

  • Prevented running OpenModelica models in XHP mode

FPGA-Based Simulation

  • Added support for new Variable RLC component

  • Added support for expression and variable evaluation in the Schematic Editor

RT-XSG

  • Fixed issue related to big uncertainty on the Xilinx internal oscillator for Kintex-7 410T by increasing a configuration watchdog timer

  • Fixed sporadic issues on analog board's EEPROM content loading for Artix-7 (OP5143) FPGA-based simulators by formalizing the clock domain

MMC

  • Added a Modular Multilevel Matrix Converter example model using average and switching function models

  • Improved voltage balancing control in the CPU

  • Improved CPU block implementing the switching function model

  • Fixed issues related to the scope of gating signals in bitstream for MMC simulation

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