TSB and interpolation
TSB are interpolating inverters. Used in conjunction with RT-EVENTS modulator or with Time-Stamped Digital Inputs (digital input with 5-10ns event capture capability), TSBs and TSB-RDs compensate for the sampling effect of the simulator. Accuracy is excellent until Tpwm/Ts>10 (Ts is the sample time of the simulator). Below this ratio, some accuracy is lost but the fundamental component of the modulation should stay accurate. In the demos models, we have Tpwm/Ts ratios 14 and 18 and simulations are as accurate as if the ratio were >100 with standard (non-interpolating) simulation.
3-level NPC and T-type TSB-RD
The inverters are simulated using TSB-RD (Time-Stamped Bridge with real-diodes) and have the following key characteristics:
- Natural rectification and high-impedance capability due to the real diodes (i.e. real SPS diode). The snubber used in TSB-RD are real RC snubbers and are typically of much higher impedance than in the regular TSB models.
- Deadtime supports lower than the simulation sample time. In this circuit, the deadtime is close to 5 µs while the simulation time step is 35 µs. This feature is NOT available in any native SPS switch model.
T-type and Neutral-Point-Clamped (NPC) 3-level inverter are 2 popular topologies for drives. They have higher switch counts than 2-level inverters but produce fewer harmonics.
3-phase NPC 3-level inverter |
3-phase T-type 3-level inverter |
In the demo models, these inverters are connected to an RL load with optional back-EMF, optional load grounding, and optional load neutral return. In these RT-LAB real-time compatible models, the user can also change the deadtime and modulation index from the Console.
PV applications
This model below represents a photovoltaic converter connected to the grid using a 20 kHz modulated T-type inverter.
Simulation of the power circuit is made 15 µs and the PWM pulse is generated by RT-EVENTS at a time step of 1 µs.
Photovoltaic converter for grid using 3-level T-type TSB-RD
3-level Flying-Capacitor
The Flying Capacitor topology is now available as a TSB-RD model. The model name is TSB_RD_3levelFlyCap_Drive and is in the ARTEMiS path.
Topology of a 3-level Flying Capacitor TSB-RD