Block

Mask

This block implements the standard way to package 2 Quad Encoder application blocks into the standardized I/O interface.

This block has no parameters.

Step[X] where X=[1,2]	These ports are the speed of the angle parameter of the generator located inside the block. The speed must be provided as a turn ratio per FPGA clock cycle, in the range [-0.5,0.5]. This value is likely to be very small. Thus, the recommended format is Fix42_42, which provides a convenient range for the Step value.
NPPR[X] where X=[1,2]	These ports are the number of pulses per turn. This signal indicates the number of A/B pulses per turn (i.e. between two consecutive Z pulses if the rotation direction does not change).
AleadsB[X] where X=[1,2]	These ports are used to specify the encoding pattern (according to the encoder specification, the A pulse may come before or after the B pulse, for a positive speed).
Polarity[X] where X=[1,2]	These ports are used to specify a polarity of A and B signals.
Sync	This port is used to reset the angle of the device to 0.
Differential	This port is used to select the output with a differential on 'B'.

QEOut	This port is the combination of the concatenated A, B and Z signal of the 2 Quad Encoder with the differential value on 'AB', 'BA' and 'BZ' when the input Differential is high.

This block has no special characteristics or limitations.