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The OP48H20 I/O module provides 16 digital inputs, 16 digital outputs, 8 analog inputs and up to 24 analog outputs for OP48xx series of FPGA and Expansion Units.
This card is only compatible with OP4800 series of devices. See the hardware platform compatibility chart for more information.
Main Features
16 digital inputs, 5-30 V single-ended range with user-programmable VTH/VTL thresholds.
16 digital outputs, 12 V internally supplied voltage or 5-30V with voltage rail externally supplied by the user.
8 analog inputs, sampling rate at 2 MSPS on 16 bits, 0-20 V single-ended /±10V differential range.
Analog outputs, factory-calibrated ±10 V range:
24 channels at 1 MSPS on 16 bits,
or12 channels at 2 MSPS on 16 bits.
Detailed non-functional and performance specifications can be found in the OP48H20 Specifications page.
This page contains high-level architectures and functional specifications.
Digital Inputs Channel Description
Two banks of 8 channels are provided (16 total digital inputs), each bank has software-configurable VTH and VTL input thresholds adjustable from 0 to 30 V.
All digital input channels are referred to GND_DIN which is galvanically isolated from the OP48xx simulator supply domain, as shown in the diagram below.
The user has two choices regarding the GND_DIN pins on the DB37 interface:
Connect a user reference (user GND)
Connect to the internal OP48xx simulator GND (loopback connection on DB37)
High-Level Circuit Diagram (per channel):
Digital Outputs Channel Description
A single bank of 16 output channels is provided
The supply voltage used by digital outputs has to be routed externally into the DB37 connector (P2, See OP48H20 DB37F Pin Assignment). The user can choose between:
Connecting the internal 12 V supply from the 48xx simulator (via loopbacks on the DB37 connector)
Connecting its own supply (5-30V V range, referred to GND_DOUT, see diagram below)
Each output channel implements an output solid-state relay which opens if any condition below is met:
There is an overcurrent fault on any Digital OUT channel
There is an overvoltage condition on the VUSER supply rail
The simulator is disabling the Digital OUT banks
High-Level Circuit Diagram (per channel):
Analog Input Channel Description
A single bank of 8 analog input channels is provided. Each channel uses a 16-bit resolution analog-to-digital (ADC) converter. Each ADC can sample up to 2 MS/s, giving a total throughput of 16 MS/s, all channels being simultaneously sampled.
±10 V differential input range (with a ±5 V common-mode rejection) or ±10 V with AIN_N connected to GND
16-bit A/D conversion
Factory-calibrated
High-Level Circuit Diagram (per channel):
Analog Output Channel Description
A single bank of 24 simultaneously sampled analog output channels is provided. Each channel uses a 16-bit resolution digital-to-analog converter and provides a ±10V single-ended output voltage.
The user can choose one of two sampling configurations below :
24 CH @ 1 MS/s. All channels are simultaneously sampled.
12 CH @ 2 MS/s. Only even channels (CH00, CH02, CH04, …) are simultaneously sampled while odd channels (CH01, CH03, CH05, …) are deactivated.
Factory-calibrated.
High-Level Circuit Diagram (per channel):
