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Block



Panel
titleTable of Contents

Table of Contents
maxLevel3


Description

This Resolver Encoder block outputs angle calculated from resolver signals: carrier, modulated sine and cosine. It is based on a phase locked loop using PI controller to retrieve the angle from the modulated sine and cosine.


Mask


Inputs

Theta0/1: The Theta angles represents the mechanical angle of the stator in turn ratio (UFix24_24).

ExtCarrier1/2: This carrier is used for modulated signals generation is the internal carrier frequency coming from CPU model. Its format is Fix16_11.

LoadIn_Offset: This input is to configure the FPGA model prior to the Real-Time Simulation. It has to be connected to a LoadIn port in asynchronous mode.

LoadInSof_Offset: This port must be connected to the associated Start of Frame of the previous LoadIn. Both ports are allocated for the Resolver OffSet.

LoadIn_Resolver: This input is to configure the FPGA model prior to the Real-Time Simulation. It has to be connected to a LoadIn port in asynchronous mode.

LoadInSof_Resolver: This port must be connected to the associated Start of Frame of the previous LoadIn.Both ports are allocated for the Resolver Unpacking.

LoadIn_PhaseShift: This input is to configure the FPGA model prior to the Real-Time Simulation. It has to be connected to a LoadIn port in asynchronous mode.

LoadInSof_PhaseShift: This port must be connected to the associated Start of Frame of the previous LoadIn. Both ports are allocated for the Resolver Phase Shift.


Outputs

Out: This output is a Simulink composite signal containing all outputs from the resolvers and encoders emulated by the block.These signals are:

  • Resolver Angles (Sin, Cos, Car): The resolver generated signals, Sine Cosine and Excitation in the XFloat8_24 format.
  • Theta_sensor0,1: The sensor angles, respectively, as a cycle ratio between 0 and 1 in the UFix24_24 format.
  • QuadEncoder0,1: The quadrature encoder generated digital pulses (A B Z), in the UFix1_0 format.

ToDataOut: This outport helps streaming the model data to the CPU through a DataOut port.


Characteristics and limitations

This block has no special characteristics.

Direct FeedthroughN/A
Discrete sample timeN/A
XHP supportN/A
Work offlineNO


If you require more information, please contact https://www.opal-rt.com/contact-technical-support/.