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In order to handle predictable mistakes, the FPGA Power Electronic Toolbox project provides a set of error messages displayed to the user.

Errors

CODE

DESCRIPTION

DISPLAY MESSAGE EXAMPLE

100

No firmware has been selected in the Schematic Editor

Error (100): A firmware should be selected from the circuit editor simulator setup.

101

Too many scenarios on FPGA (parameter sets)

Error (101): Number of scenarios used on FPGA (6) exceeds the maximum supported for this circuit (5). To support more scenarios use option "use CPU to store and load scenario"

102

Empty model

Error (102): The model is empty. Please provide some inputs.

103

No measurements in the model

Error (103): Circuit should contain at least one measurement to be usable.

104

Disjoint circuit

Error (104): The model shall not be composed of two disjoint circuits when analysis method is Nodal Analysis (eHS Gen4). Circuits composed of multiple separated sub-circuits are not supported in this case.

105

Too many sources

Error (105): The number of sources exceeds the limit supported by eHS Gen4 x16. The maximum number of sources allowed in the circuit is 16.

106

Too many switches

Error (106): The number of switches (93) exceeds the limit (48) supported by eHS

Gen4 x16.The maximum number of switches allowed in the circuit is 24.

Gen 5 x32. Switches are added by:

- Single Switch: 47 units * 1 switches

- Half Bridge: 23 units * 2 switches

107

Too many measurements

Error (107): The number of measurements exceeds the limit supported by eHS Gen4 x16. The maximum number of measurements allowed in the circuit is 16.

108

Too many states

Error (108): The number of states exceeds the limit supported by eHS Gen4 x16. The maximum number of electrical states allowed in the circuit is 80.

109

Too many machines

Error (109): The maximum number of PMSM DQ supported is exceeded in the schema. For the selected firmware, only a maximum of 2 PMSM DQ is allowed.

110

Wrong file extension for VDQ

Error (110): Unsupported resource file extension: jpeg. Variable DQ only supports JMAG (.rtt) and ANSYS (.txt) formats.

111

Machine resolver external excitation parameters mismatch in the Schematic Editor

Error (111): The machine 'scim1' has its parameter Excitation Type assigned to external but no Analog Input has been assigned to the parameter Excitation Source.

112

No resource file found for a machine in VDQ or SH mode

Error (112): The component 'pmsm1' parameter Resource File cannot be found. Please provide some input in the "Motor Configuration" field in the Schematic Editor model.

113

BLDC not supported with the selected firmware

Error (113): The current version of the firmware does not support the BLDC machine.

114

Firmware resource not found

Error (114): The model configuration requires a firmware resource of type PMSM / BLDC, but none was found in the selected firmware VC707_2-EX-0001-3_2_8_621-eHSx128_Gen4_PMSMSH_IOConfig1-03-04.

115

Too many CPU driven gates

Error(115): The number of gates driven via the CPU exceeds the limit supported with the selected firmware. The maximum number of gates driven via the CPU allowed in the circuit is 72.

116

Missing parameters in the PMSM VDQ configuration file

Error (116): Error parsing the PMSM VDQ configuration file. Please update your file, following parameters are missing: DqTransformAngleOffset.

117

Negative time step for eHS

Error(117): The time step of eHS must be positive, but '-3.26' was found.

118

User time step is too small

Error(118): Unable to achieve the requested user time step of 200 ns. The minimum achievable time step for this circuit is 210 ns. (eHS cannot achieve the desired time step).

119

User time step is too big

Error(119): Unable to achieve the requested user time step of 4000 ns. The minimum achievable time step for this circuit is 2500 ns. (eHS cannot achieve the desired time step).

120

Circuit with a 'PMSM Spatial Harmonics' block requires a time step (Ts) multiple of 50 ns

Error(120): Circuit with a 'PMSM Spatial Harmonics' block requires a time step (Ts) multiple of 50 ns.

121

Too many AC sources

Error (121): The number of AC sources (40) exceeds the supported limit. For the selected firmware, only a maximum of 32 AC sources are allowed.

122

Circuit too large

Error (122): The circuit exceeds the number of computation unit available. Try to reduce the number of inputs, outputs, measurements or find equivalent circuit for group of components.

123

Circuit validation error

Error (123): The circuit validation has failed. Errors during circuit analysis:
 - The capacitor c2 cannot be connected in parallel with voltage source vsrc2.
 - The inductor l2 cannot be connected in series with current source isrc1.

124

Unsupported component

Error (124): Unsupported component sw1 (SW) with eHS Gen 5 solver.

125

User time step is not multiple of the

FPGA clock period

smallest granularity

Error (125): Model time step specified in the Schematic Editor (206ns) should be a multiple of the

FPGA clock period (5ns

smallest circuit time step granularity (50ns).

126 

Unsupported firmware license class

Error (126): Unsupported firmware license class for eHS Gen5: x64.

127

Not enough states

Error (127): No state found in the circuit. Circuit should contain at least one state (Inductor, Capacitor, Transformer).

128

Incompatible Version

Error (128): The Schematic Editor version 2.8.3 in use is not compatible with eFPGASIM version 2.9.1. Please install Schematic Editor version 2.9.1 or higher.

129

Incompatible Solver Settings

Error (129): The selected solver settings Analysis Method Nodal Analysis(eHS Gen 4) is not compatible with the firmware VC707_2-EX-0001-3_3_1_790-eHSx128_Gen5_IOConfig1-F5-4E.

130

Firmware Unavailable

Error (130): The model being imported uses a firmware that is not available. Please import the missing .ioconf file inside the Schematic Editor.

131

Database Unavailable

Error (131): OPAL-RT Unified Database is unavailable. Please verify your Schematic Editor installation.

132

Too many non-linear components

Error (132): The number of non-linear components (70) exceeds the supported limit. Only a maximum of 64 are allowed.

133

Invalid parameters for Surge Arrester

Error (133): Surge arrester sa1 has invalid parameters (it must have k2 > k1, k2 > k3 and alpha1 > alpha2 > alpha3).

134

Invalid Parameter Value compare to the Bounding Value

Error (134): The value v1 of the parameter p1 is invalid. The value must be (greater than or equal to | greater than | less than or equal to | less than) to v2.

135

Integer Type Parameter Value

Error (135): The value v1 of the parameter p1 is invalid. The value must be an integer.

136

Unsupported scenarios for such a big circuit

Error (136): The circuit size exceeds the number of computation unit available to support multiple scenarios (529/512).

137

Invalid table parameters

Error (137): The values for parameter IV Table voltages values are invalid. The values need to be strictly monotonically increasing. Please refer to page "Surge Arrester IV parameters file" in official documentation for further details.

138

Unsupported feature

Error (138): The feature Scenario from CPU is unsupported with current version 0.0.0 of eHS, needs 1.0.0 or higher. Update to a firmware which contains a newer version of the block to use this feature.

139

Malformed JSON

Error (139): Cannot read resource file, JSON file had following formatting issue: Unterminated array at line 1 column 23 path $.backEmfValues[1]

140

Ill-conditioned matrix

Error (140): Unable to process circuit with the specified parameters, singularity while trying to invert matrix.

Try to slightly change

To remedy:

  1. If possible, try changing discretization method to Backward Euler.

  2. Try adding high value resistances between primary and secondary of transformers.

  3. Try adjusting the relaxation parameter of

the
  1. switches and

try again
  1. bridge components.

141

Too many TSB switches (deprecated)

Error (141): The total number of switches (100) added by Half Bridges (2)

&

, Single Phase Cycloconverters (8) & 3-Lvl Arms (4)

is 34 and

exceeds the limit supported by eHS Gen 5 x128. The maximum number of Half Bridge & Single Phase Cycloconverter switches allowed in the circuit is

32

128.

142

Too many low latency measurements

Error (142): "The number of low latency external measurements (140) exceeds the limit supported by eHS Gen 5 x128. "+ "The maximum number of low latency external measurements allowed in the circuit is 128. Try to reduce the number of [Surge Arrester] components in your circuit."

143

Unable to evaluate expression

Error (143): A parameter has an expression value that could not be resolved.

  • Block 'vsrc1'

  • Unable to evaluate 'dc_value * 0.5' in Matlab

144

Outdated feature

Error (144): The feature "eHS Gen 5" has been improved and requires to update eHS Gen 5 to version 1.2.0. Update to a firmware which contains a newer version of the block to use this feature.

145

Unable to evaluate smallest Ts

Error (145): The Solver Strategy "Smallest Time Step" can't be apply on this circuit. Using the "Lowest Latency" strategy in the Schematic Editor will solve this issue but will increase the Time step of the circuit."

146

Model has unsaved changes

Error (146): The Schematic Editor model has unsaved changes. Save the model before loading the circuit.

147

Model uses a reserved name as an input or output

Error (147): The name “reset” is reserved for a utility pin. Change the name in the circuit model.

  • Reserved names: “parameter_set_id”, “parameter_set_output_id”, “reset”

148

Malformed Pun file

Error (148): Cannot read resource file “Pun File”. Parser had the following issue:

Cannot find ‘poles impedance’ in ' 3.804409763194375955D-07 1.494890152734087937D-05 3.348494529259195805D-05 '

Invalid propagation section

Invalid mode section 1

149

Frequency dependent line number of phases mismatch with Pun file

Error (149): Frequency dependent line “fd1” has 3 phases, which doesn’t match the configuration file “Pun File” that has 6.

150

Too many frequency dependent line phases

Error (150): The number of Frequency Dependent Line total phases (18) exceeds the limit. The maximum number of Frequency Dependent Line phases is 16.

151

Time step too high for current frequency dependent lines

Error (151): The current time step (4000 ns) is invalid with the current frequency dependent lines.

Minimum time step is 10 ns, maximum time step is 2225 ns.

You can try splitting the longest frequency dependent line in smaller segments.

152

Schematic Editor connection to unsupported parameter in ioconf

Error (152): Trying to connect signal "Omega_r" of component "pmsm1" to CPU or IO but no matching signal information was found in selected firmware description. Regenerate ioconf to make sure firmware description file is up to date with features available in Schematic Editor.