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LTC6813

The LTC6813 is a virtualized integrated circuit designed to mimic the behavior of a real cell monitoring device. Within the VeriStand project, it is represented as a Device item in the configuration tree and is emulated on the FPGA of the Real-Time target upon project deployment. Each LTC6813 device in the Ring supports the monitoring of up to 18 battery cells, along with 9 GPIO channels. Passive balancing functionality is also included.

Section Channels

Expand the Device section in the configuration tree to display the following VeriStand channels. Channel values can be dynamically modified during execution.

Certain channel values are represented in hexadecimal or binary notation. Refer to How to Manage Hexadecimal and Binary Data in VeriStand for additional instructions.

Channel Name

Type

Format

Units

Default

Description

Channel Name

Type

Format

Units

Default

Description

Enable

Input

Binary

 

1

Enables or disables the emulated device during execution.

  • 0 - Device is disabled and bypassed for SPI transmission.

  • 1 - Device is enabled. Normal operation.

CRC Check

Input

Binary

 

1

Enables or disables the cyclic redundancy check (CRC) of the command packet error code (PEC) and data packet error code (DPEC) of the SPI transmissions received by the emulated device.

  • 0 - No CRC check is performed.

  • 1 - CRC checking is enabled. Normal operation.

Port A Enable

Input

Binary

 

1

Enables or disables SPI transmission on the Port A side of the emulated device. Use this channel to simulate a fault in the SPI communication.

  • 0 - SPI transmission is disabled on the Port A side of the device.

  • 1 - SPI transmission is enabled. Normal operation.

Port B Enable

Input

Binary

 

1

Enables or disables SPI transmission on the Port B side of the emulated device. Use this channel to simulate a fault in the SPI communication.

  • 0 - SPI transmission is disabled on the Port B side of the device.

  • 1 - SPI transmission is enabled. Normal operation.

Redundancy Fault

Input

Binary

 

0

Forces a digital redundancy fault on the emulated device and stores a digital redundancy fault code in place of the ADC result.

  • 0 - Digital redundancy check passes.

  • 1 - Digital redundancy check fails.

Selftest Fault

Input

Binary

 

0

Forces a self test fault in response to the CVST, AXST, and STATST commands.

  • 0 - Device passes the self test and the MUXFAIL bit is set to 0.

  • 1 - Device fails the self test and the MUXFAIL bit is set to 1.

This device does not write ADC Output Patterns to the Cell Voltage, Auxiliary, or Status Registers when a self test is commanded.

Vref2

Input

Decimal

V

0

Emulates the VREF2 pin of a real device.

Vreg

Input

Decimal

V

0

Emulates the VREG pin of a real device.

Vregd

Input

Decimal

V

0

Emulates the VREGD pin of a real device.

Internal Die Temperature

Input

Decimal

°C

0

Emulates the Internal Die Temperature Measurement on the device, in degrees Celsius. The Internal Die Temperature is subsequently used to calculate the ITMP value stored in Status Register Group A.

Sum of Cells

Input

Decimal

V

0

Emulates the Sum of All Cells Measurement on the device, in degrees Celsius. The Sum of All Cells is subsequently used to calculate the SC value stored in Status Register Group A.

Cell Measurement x

Input

Decimal

V

0

Emulates the cell voltage measurement of Cell x. This measurement is taken between pin Cx and pin C(x-1) on a real device.

GPIO x

Input

Decimal

V

0

Emulates pins GPIO1 through GPIO9 of a real device.

Open Wire GPIOx

Input

Binary

 

0

Emulates an open wire on a GPIO line of the emulated device.

  • 0 - Uninterrupted connection at pin GPIOx.

  • 1 - Open wire at pin GPIOx.

Open Wire Cx

Input

Binary

 

0

Emulates an open wire between the external cells. This open wire condition can be detected using the ADOW command.

  • 0 - Uninterrupted connection at pin Cx.

  • 1 - Open wire at pin Cx.

STCOMM Reply Command

Input

Hexadecimal

 

0

When the STCOMM command is received from the SPI Master, the value of this channel is written to the COMM register of the emulated device. Map the command communication interface of an external device model, acting as an I2C or SPI slave, to this input channel.

To set the Default Value of this channel in the system definition, convert it to decimal notation. See How to Manage Hexadecimal and Binary Data in VeriStand Channels for more information.

STCOMM Reply Data

Input

Hexadecimal

 

0

When the STCOMM command is received from the SPI Master, the value of this channel is written to the COMM register of the emulated device. Map the data communication interface of an external device model, acting as an I2C or SPI slave, to this input channel.

To set the Default Value of this channel in the system definition, convert it to decimal notation. See How to Manage Hexadecimal and Binary Data in VeriStand Channels for more information.

Last Command Received

Output

Hexadecimal

 

0

Outputs the last command received from the SPI Master.

Command CRC Check

Output

Binary

 

0

Binary flag indicating a Command CRC mismatch in the last transmission received from the SPI Master.

  • 0 - No CRC mismatch detected.

  • 1 - CRC mismatch detected.

Data CRC Check

Output

Binary

 

0

Binary flag indicating a Data CRC mismatch in the last transmission received from the SPI Master.

  • 0 - No CRC mismatch detected.

  • 1 - CRC mismatch detected.

PWM Discharge Control x

Output

Binary

 

0

Outputs the duty cycle of the PWM controlling the balancing switch for cell Cx. The value is represented in 4-bit binary format and corresponds to the PWMC Setting. This channel can be mapped to the input of an external cell model to regulate its discharge process.

Discharge Cell x

Output

Binary

 

0

Binary flag outputting the status of DCC bit x in Configuration Register Groups A and B.

  • 0 - DCC bit is not asserted.

  • 1 - DCC bit is asserted.

WRCOMM Command

Output

Hexadecimal

 

0

Outputs the command stored in the COMM register as a result of the latest WRCOMM command received from the SPI Master. Map this channel to the input of an external device model acting as an I2C or SPI slave.

WRCOMM Data

Output

Hexadecimal

 

0

Outputs the data stored in the COMM register as a result of the latest WRCOMM command received from the SPI Master. Map this channel to the input of an external device model acting as an I2C or SPI slave.

SPI Mode

The SPI Mode of the LTC6813 device is statically set to SPI Mode 3, where the both the Clock Polarity (CPOL) and the Clock Phase (CPHA) are 1.

Supported Commands

The LTC6813 device supports the following SPI commands:

Commands

Description

Commands

Description

WRCFGA

Write Configuration Register Group A

WRCFGB

Write Configuration Register Group B

RDCFGA

Read Configuration Register Group A

RDCFGB

Read Configuration Register Group B

RDCVA

Read Cell Voltage Register Group A

RDCVB

Read Cell Voltage Register Group B

RDCVC

Read Cell Voltage Register Group C

RDCVD

Read Cell Voltage Register Group D

RDCVE

Read Cell Voltage Register Group E

RDCVF

Read Cell Voltage Register Group F

RDAUXA

Read Auxiliary Register Group A

RDAUXB

Read Auxiliary Register Group B

RDAUXC

Read Auxiliary Register Group C

RDAUXD

Read Auxiliary Register Group D

RDSTATA

Read Status Register Group A

RDSTATB

Read Status Register Group B

WRSCTRL

Write S Control Register Group

WRPWM

Write PWM Register Group

WRPSB

Write PWM/S Control Register Group B

RDSCTRL

Read S Control Register Group

RDPWM

Read PWM Register Group

RDPSB

Read PWM/S Control Register Group B

CLRSCTRL

Clear S Control Register Group

ADCV

Start Cell Voltage ADC Conversion and Poll Status

ADOW

Start Open Wire ADC Conversion and Poll Status

CVST

Start Self Test Cell Voltage Conversion and Poll Status

No ADC Output Pattern is written to the Cell Voltage Registers as a result of this command. If the Selftest Fault channel is enabled (1) when this command is received, the MUXFAIL bit is set to 1.

ADOL

Start Overlap Measurements of Cell 7 and Cell 13 Voltages

ADAX

Start GPIOs ADC Conversion and Poll Status

ADAXD

Start GPIOs ADC Conversion with Digital Redundancy and Poll Status

AXOW

Start GPIOs Open Wire ADC Conversion and Poll Status

AXST

Start Self Test GPIOs Conversion and Poll Status

ADSTAT

Start Status Group ADC Conversion and Poll Status

ADSTATD

Start Status Group ADC Conversion with Digital Redundancy and Poll Status

STATST

Start Self Test Status Group Conversion and Poll Status

ADCVAX

Start Combined Cell Voltage and GPIO1, GPIO2 Conversion and Poll Status

ADCVSC

Start Combined Cell Voltage and SC Conversion and Poll Status

CLRCELL

Clear Cell Voltage Register Groups

CLRAUX

Clear Auxiliary Register Groups

CLRSTAT

Clear Status Register Groups

PLADC

Poll ADC Conversion Status

WRCOMM

Write COMM Register Group

RDCOMM

Read COMM Register Group

STCOMM

Start I2C/SPI Communication

MUTE

Mute Discharge

UNMUTE

Unmute Discharge

 

 

 

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