Introduction to the OPAL-RT Power Electronics Add-On for NI VeriStand

The OPAL-RT Power Electronics Add-On for NI VeriStand is a powerful FPGA-based simulation tool for Hardware-in-the-Loop (HIL) testing of controllers for power electronics applications. The Power Electronics Add-On combines the performance of several leading floating-point FPGA solvers developed by OPAL-RT Technologies with an intuitive workflow integrated directly within the NI VeriStand software suite to create a scalable and flexible HIL test bench.

Power Electronics Add-On Features

• The OPAL-RT electric Hardware Solver (eHS): a floating-point solver that enables users to simulate an electric circuit on FPGA simply and without having to write the mathematical equations. It is typically used to simulate power electronics systems such as converters, inverters, and drives.

• FPGA-based Electric Machine Model solvers

• Sub-microsecond simulation time-steps

• Simple and intuitive user interfaces (UIs) for connecting the electrical model inputs and outputs to high speed Input/Output (IO) to create an interface between the simulated model and a real Device Under Test (DUT)

• Signal generation engines (Sinewave, PWM, Sinusoidal PWM) built directly into the FPGA design to generate control signals for open and/or closed loop testing

• Compatibility with the NI VeriStand platform which includes support for automotive communication protocols (CAN, XNET, FlexRay), data acquisition hardware (DAQ), simulation models, procedures, signal conditioning via SLSC, and more.

Document Structure

The document is divided into the following primary sections:

1. Getting Started: Outlines the software & hardware requirements of the Power Electronics Add-on and provides installation and licensing instructions. Refer to Getting Started with an Example Project to simulate your first electrical model within minutes. 

2. Power Electronics Add-On Custom Device: A detailed description of each component, parameter, and channel in the Power Electronics Add-On.  This structure of sections mirrors the structure of the configuration tree in the Power Electronics Add-On to simplify navigation.

3. Examples: This section provides examples that can be replicated, built, and modified as needed.  They can serve as a starting point to understanding the capabilities of the Power Electronics Add-On.

4. How-To: A collection of articles and tutorials explaining how to perform common tasks in the Power Electronics Add-On.

NI VeriStand

NI VeriStand is an application software developed and maintained by NI that enables the configuration of simulation models, I/O channels, data logging, stimulus generation, and host communication for NI real-time hardware.  Although this document does not focus on the features of VeriStand, it is useful to understand the typical VeriStand workflow and out-of-the-box features.  For more information and resources, please see What is VeriStand?

The VeriStand Environment includes the following major components:

• VeriStand Editor - The VeriStand Editor conveniently regroups all the different components that make up a VeriStand application. It can be used to easily access project files, including the System Definition and Screen files. This interface is also used to start, deploy, and stop the real-time application.

• System Explorer Window - The System Explorer is used to modify the System Definition file, which contains pre-execution settings of the real-time application. In other words, all the settings and parameters that must be configured before the application is deployed and run are managed here. The System Explorer can be used to easily configure DAQ hardware, XNET hardware, Custom Devices (like the OPAL-RT Power Electronics Add-On for NI VeriStand), Simulation Model, Procedures, and more.

Power Electronics Simulation Workflow

The FPGA-based solvers included in the Power Electronics Add-On can be used independently or combined to simulate nearly any power electronics or machine drive circuit in real-time, while maintaining a sample time below 1µs.

The solution provides a simple workflow for users:

1. Design a power electronics circuit using a circuit editor supported by the eHS solver. See Supported Circuit Editors for a detailed list.

2. Configure the simulation parameters.

3. Deploy the Real Time application, which will in turn configure the OPAL-RT FPGA solvers.

4. Connect a real or simulated controller directly to the IO of the selected NI hardware, provide stimuli, and acquire measurements.
   
   

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