Description

This block performs the communication with the FPGA in order to send the configuration of the RT-XSG Scope Series.

Mask Parameters

Controller Name: Links this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block. The OpCtrl block controls initialization of the settings of one specific FPGA-based card in the system.

Load In Port Number: This should reflect the LoadIn port used to configure the RT-XSG Scope Series in the FPGA.

Data Out Port Number: This should reflect the DataOut port used to receive the RT-XSG Scope Series data from the FPGA.

Inputs

Configuration: This input should be connected to the XSG Scope Series Control Panel found in the console of the RT-LAB model.

Outputs

Scope Ch: This output returns the 8 channels from the RT-XSG Scope Series in the FPGA. When less than 8 channels are used, the unused channel remains 0.

Valid: This output goes to 1 while values are being sent from the FPGA.

Rate: This output returns rate used for sampling the channels in the FPGA.

sof: This output goes to 1 at the of a new frame (Start Of Frame). It should be used with an OpTrigger to synchronize the console or an OpWriteFile with the data coming from the FPGA.

Status: This output returns the status of the Load In and the Data Out status. Expected values are -1 and 0.

Characteristics and limitations

If you require more information, please contact https://www.opal-rt.com/contact-technical-support/.