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Model name

600-node 20 kV distribution system

Highlights

  • Only simulation tool capable of simulating large scale distribution feeders in real time below 70 us without decoupling
  • High performance gain with decoupling: 2 cores at 20 us

Not limited in types of electrical component that can be used, e.g. fully-switched models for power electronics

Model diagram


Single-phase nodes

615

Sources (3φ)

1

Transformers (3φ)

1

Loads (3φ)

122

RLC (3φ)

324

Breakers (3φ) and faults (4φ)

19 + 1 = 20

Hardware

OP5707XG

  • Motherboard: X11DPL-i
  • Processor: Intel(R) Xeon(R) Gold 5222 CPU @ 3.80GHz; 8 cores
  • RAM: 32 GB

Software

  • Platform: HYPERSIM
  • Compiler: GCC 8.3.0

Minimum license required

HXG Max (2 cores)

Results 1 core

  • Number of core(s): 1
  • Minimum time step: 65 us *
  • Average execution time: 59.6 us

Results 2 core

  • Number of core(s): 2 (with stubline)
  • Minimum time-step: 20 us *
  • Total average execution time (sum on all cores): 30.2 us

* Performance under transient conditions varying considerably depending on the study type, this benchmark measures the minimum achievable time-step without overruns in steady-state conditions. A rule of thumb is to consider 10 to 20 % buffer time for calculations under transient conditions.

Benchmark

Performance comparison between new (OP5707XG) and previous (OP5700) hardware generations

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