Description

This block provides a generic Serial to Parallel interface. It allows the user to route inputs to outputs programmatically using a user-defined configuration stream.

Mask Parameters

Number of output signals: This parameter defines the number of outputs.

Number of input signals:This parameter defines the number of inputs.

FPGA period: This parameter is used when running offline simulation (Advanced Users). It defines the hardware period of the FPGA. Default is 5ns for 200MHz clock.

Inputs

Data

SerialIn: This input should be connected to a OPAL-RT FLWS protocol compliant signal.

Config

LoadIn: This input should be connected to a LoadIn port. It receives the user-defined configuration fromt the RT-LAB model.

LoadInSof: This input should be connected to a LoadIn SOF port. Port number must be the same as LoadIn one.

Rst

Rst: This input is used as a active high reset for the functionality. When used, outputs of the block are equal to 0. This does not reset the configuration.

Outputs

Last: This output is extracted from the OPAL-RT FLWS protocol input. It is active high, when the last input data has been proceded.

Out: This output provides a Simulink bus which size is equal to the number of outputs parameter.

If you require more information, please contact https://www.opal-rt.com/contact-technical-support/.