Documentation Home Page Cell Monitoring Device Emulation Add-On for NI VeriStand Home page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.

Getting Started with a Simple Project

In this tutorial, we will explore the CMDE Add-On by creating a simple project that emulates a cell monitoring device and receives commands from an externally connected SPI Master (BMS). The steps described below can be adapted to any of the CMDE Add-On Hardware Configurations and device types.

Step 1: Create VeriStand Project

  1. Launch NI VeriStand and select the option to create a new Default Project.

  2. Enter a Project Name and click Create.

  3. In the VeriStand Editor, click Configure… to launch the system explorer.

  4. In the system definition tree, expand Targets >> Controller.

  5. Right-click Custom Devices and navigate to OPAL-RT >> CMDE Add-On to add the CMDE Add-On custom device.

  6. In the Configuration dropdown, select a Hardware Configuration based on the type of emulated device and the supported FPGA card. Tate note of the Target name listed for the Bitfile.

Getting Started HW Config.PNG
Add the CMDE Add-On to the project and select a hardware configuration.
  1. In the system definition tree, expand CMDE Add-On and navigate to the Ring 1 section. Enable Device 0.

  2. Save the system definition.

Ring0.PNG
Enable Device 0.

Step 2: Confirm Target Configuration

  1. Open the NI Measurement and Automation Explorer (NI MAX).

  2. In the configuration tree, expand Remote Systems and locate your Real Time PXI target to confirm that it is properly connected.

  3. Click the target and take note of its IP Address.

  4. Expand Devices and Interfaces and locate the targeted FPGA card under the PXIe chassis. The card model must correspond to the one listed in the Hardware Configuration chosen in Step 1.7.

  5. Confirm that the name of the FPGA card corresponds to the Target name recorded in Step 1.6. Typically, this is CMDE0.

 

Step 3: Connect SPI Master

  1. Locate the pin assignment information for the selected Hardware Configuration.

  2. Take note of the connector and pin number for the SCK, CS, MISO, and MOSI signals on Port A.

  3. Connect the SPI Master signals to the proper DIO channel pins.

Some systems may include mapping boxes or custom cabling on the PXI connector. In this case, refer to the system documentation to make the connections to the SPI Master.

Step 4: Configure Target Settings

  1. In the system definition tree of the VeriStand project, navigate to the Controller section.

  2. Set the Operating System to Linux_x64.

  3. Configure the IP Address field with the information obtained in Step 2.3.

  4. If permissions are configured on your Real Time target, enter the credentials in the Username and Password fields.  National Instruments targets are programmed with the following credentials by default:

    Username: admin     Password: <blank>

  5. Save and close the System Definition.

 

Step 5: Create User Interface

  1. In the VeriStand Editor, double click the Screen file (.nivsscr) to open the user interface.

  2. Add a Numeric Indicator to the screen and map it to the Last Command Received channel of Device 0.

  3. Click the indicator to display its Properties. Expand Display Format and choose the Hexadecimal option. Enable Show radix.

  4. Add a Numeric Control to the screen and map it to the Port A Enable channel of Device 0.

  5. Save the Screen file.

 

Step 6: Deploy VeriStand Project

  1. In the VeriStand Editor, select Idle >> Deploy.

  2. Set Port A Enable to 1.

  3. Send a known command from the SPI Master and confirm that the correct hexadecimal value is displayed in the Last Command Received indicator.

OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323