I/O Pins Format

FMU exported from a single component have following I/O pins that are in common with Native Library components.

No

Pin Description

Pin Type

Instruction

1

Set/Get reference increment

I/O

exciterID/pins/dVref

turbineID/pins/dGref

2

Get component output

O

exciterID/pins/Efd

turbineID/pins/Pmech

stabilizerID/pins/Vothsg

The pins path format that are exclusive to single component FMU are listed below.

No	Pin Description	Pin Type	Instruction	Examples
1	Component pins	O	ComponentID/Component pins name	ex1/EFD, ex1/EFD0
2	Sub-block pins	O	ComponentID/Sub-block_name.pins_name	ex1/add3.y, ex1/add3.u
3	Component parameter/variable	O	ComponentID/Data name Type supported: 'Real' and 'parameter Real(fixed = false)'	ex1/VREF_0, ex1/EFD_0
4.	Sub-block parameter/variable	O	ComponentID/Sub-block_name.data_name Type supported: 'Real' and 'parameter Real'	ex1/gain1.K, ex1/lag1.T

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