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v2.20 Decoupling on Aero Microgrid - S-Function - eHS Gen5
Description
This project demonstrates the use of the eHS solver to compute the outputs of an FPGA-based Microgrid circuit created using the OPAL-RT Schematic Editor in real time. The FPGA-based circuit uses decoupling blocks to improve the minimum time step of the simulated circuit. With this example project, the user is able to control the simulation parameters (inputs and gates values) in real-time via the RT-LAB console.
The model represents an Aero Microgrid circuit, with 4 three-phased AC Voltage sources connected to AC and DC loads. Below each source is an AC resistive load, and all the loads are connected together in a chain. Under each AC load is a rectifier circuit connected to a DC resistive load. The DC loads are connected two by two with each other. Most of the connection points between components can be connected or disconnected at will using switches. The image below represents an overview of the Schematic Editor circuit, with the different parts highlighted.
There are two decoupling blocks added to this Microgrid circuit. They both replace a capacitor at the exit of the left rectifier circuits. Those decoupling blocks allow the circuit to be separated in two parts, splitting the AC and DC sections. The time step can thus be improved compared to the non decoupled version.
In S-Function workflow, example models support any chassis. You can contextualize your example model by selecting the chassis in the Chassis selection block.
SCHEMATIC EDITOR S-function OP4512 OP4610 OP5607 OP5707
Requirements
RT-LAB, and eHS FPGA-based Power Electronics Toolbox must be installed in order to successfully run this example project.
This demo requires HIGH PERFORMANCE license to run properly.
Setup and Connections
It is possible to execute this simulation in different chassis. The “Simulator Selection” block allows the user to select the appropriate target and automatically change the configuration and firmware.
The following parameters used for the simulation are editable by the user in the model:
Ts: CPU simulation time step, default value is 20 µs.
Amplitude: Amplitude of the AC voltage sources.
Frequency: Frequency of the AC voltage sources.
There are also various switches that can be open or closed in the circuit, “off” meaning the switch is open and “on” meaning the switch is closed:
Real-Time model (RT)
The RT model is composed of the following two main subsystems: the Console (SC) and the Master (SM).
The console subsystem, which runs on the host computer, manages the communication between the host computer and the target simulator. It is used as a user interface during the real time simulation to control the model and visualize the outputs of the eHS solver.
The master subsystem, which runs in real time on the target simulator, manages the communication between the CPU model and the eHS solver running on the FPGA. For example, gates and sources parameters sent from the console are processed in this subsystem and subsequently sent to the eHS solver.
Running the model
In order to run the example, follow the procedure below:
If eFPGASIM is installed, add the example project to RT-LAB by selecting File>>New>>RT-LAB Project>>eFPGASIM>Schematic_Editor_Workflow>>eHS Gen 5>>Decoupling>>SFUN>>DecouplingGen5.
Compile the RT Model by clicking on Build in RT-LAB.
Once the model has been successfully built, Load and Execute the model in RT-LAB in order to begin the real-time simulation.
Once the real-time model and the eHS are running, observe the results of the eHS simulation by opening the measurements subsystem in the Simulink Console.
The bottom displays show the RMS of the AC source voltages on phase A and the power output of the AC sources
The first scopes show the AC sources voltage and current measurements
The last scopes show the rectifier circuits' outputs
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