Documentation Home Page ◇ eHS Toolbox Home Page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.

v2.20 Frequency Dependent Line - S-Function - eHS Gen5

Owned by Fabien Ducat
Nov 11, 2024
4 min read

Description

This model illustrates the use of the frequency dependent line (FD Line) developed in schematic editor software and solved using the eHS solver. This example is based on OPAL-RT's real-time simulator utilizing the FPGA to simulate the behavior of a frequency dependent line in real-time. One RT-LAB model and one Schematic Editor model is provided to illustrate the exchange of information between the controller and plant.

The model represents a 150km three phase frequency dependent line with three phase voltage sources at both ends. The phase of the left and right voltage sources can be controlled via the phase block in the console. Three controllable faults to ground are placed at different points on phase A of the line. One at 75km, one at 100km and one at 125km. Each fault location, duration and frequency are configurable via the Fault Control block in the console. Voltage and current measurements are placed at the begin, end and each fault location along the line for each phase.

In S-Function workflow, example models support any chassis. You can contextualize your example model by selecting the chassis in the Chassis selection block.

SCHEMATIC EDITOR S-function OP4512 OP4610 OP5607 OP5707 op4810 op4815

Table of Contents

Requirements

The RT-LAB, Schematic Editor/Unified Database and eFPGASIM toolboxes must be installed on the host and target computers in order to run this example model properly. Please refer to the product documentation for details on version compatibility.

This project has been created with a Versal Board that is connected to another Chassis through PCI-Express. That’s why the Board Index setup in the OpCtrl block has a specific value:

image-20240816-140815.png

Setup and Connections

This model must be run with both the Hardware Synchronized and XHP modes enabled. All the variables required for the model are defined in the “initFrequencyDependentLine.m” file that is automatically loaded during simulation.

Procedure

RT-LAB model with eHS interface

Run this demo : efsOpenExample('FdLine_IO');

The following procedure will help the user understand the functionality and linking between eFPGASIM, RT-LAB and Schematic Editor. A Hardware-in-the-loop based RT-LAB model, "FdLine_IO", is provided to illustrate the exchange of information between the controller and plant.

  1. Click on "Run this demo" at the top of this section. The RT-LAB model will open automatically.

  2. The RT-LAB model consists of a master subsystem (i.e. "sm_computation") and a console subsystem (i.e. "sc_user_interface").

    • The master subsystem has power network interface ("eHS_SE_SFunction_Drivers")

  • The console subsystem is used to control set points, such as the magnitude, the frequency, the phase of source voltage and fault control during real-time simulation. Users can also monitor voltages and currents of the frequency dependent lineat any point during the simulation.

 

  1. For this example the role of each set points are as following:

    1. “Amplitude”: This sets the amplitude of the AC voltage source;

    2. “Frequency”: This sets the frequency of the AC voltage source;

    3. “Phase”: This sets the phase of the AC voltage source;

    4. “Fault control”: This sets the fault state

  2. The "eHS_SE_SFunction_Drivers" solver solves the power network built using schematic editor software during the real time simulation. The circuit built in schematic editor can be edited or viewed by choosing the edit option available in the solver block.

 

  1. When the model is compiled in Simulink, the configuration of the eHS solver will be generated according to the schematic editor circuit characteristics. Elements will be put into matrices and stored in .mat files that will be transferred into the solver when the model is run from the RT-LAB interface. Matrices are generated during model compilation in RT-LAB.

     

  2. During real-time execution;

    1. Set the AC voltage sources' amplitude, frequency and phase parameters for the simulation.

    2. Set the fault control options to set the repetitive fault’s location, duration and time between faults.

 

OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323
Follow OPAL-RT: LinkedIn | Facebook | YouTube | X/Twitter