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V2.14 Kintex-7 325T - eHS x32 - PMSM SH - IO Config1

OPAL-RT TECHNOLOGIES
1751 Richardson suite 1060, Montréal QC Canada H3K 1G6
www.opal-rt.com

© 2023 OPAL-RT TECHNOLOGIES All rights reserved

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SPS WORKFLOWSCHEMATIC EDITOR WORKFLOW

Introduction

This firmware includes:

  • One eHS x32 Gen4 Solver
  • One Dual Permanent Magnet Synchronous Machines (PMSM-SH) model
  • One Analog Output Mapping and Rescaling (AOMR) module
  • One Analog Input Differential Rescaling (AIR) module


LoadIn/DataIn/DataOut Mapping


LoadIn

DataIn

DataOut

1

Config eHS

Inputs eHS

eHS Averaged

2

Scenario / Rst eHS = Status

TSDO 1 - eHS 0 to 7

eHS DownSample

3


TSDO 2 - eHS 8 to 15

Digital In 1A - 0 to7

4

PWM 1B -  0 to 7

TSDO 3 - eHS 16 to 23

Digital In 1A - 8 to 15

5

PWM 1B -  8 to 15

TSDO 4 - eHS 24 to 31

Digital In 1A - 16 to 23

6

PWM 1B -  16 to 23


Digital In 1A - 24 to 31

7

PWM 1B -  24 to 31


Analog In 2A - 0 to 7

8



Analog In 2A - 8 to 15

9



PMSM SH 1/2

10



Encoder Input on RS422

11



Encoder Input on Digital In 1A

12

Config AOMR



13

eHS PWM 1 - eHS 0 to 7



14

eHS PWM 2 - eHS 8 to 15



15


Digital Out 1B - SDO 0 to 7


16


Digital Out 1B - SDO 8 to 15


17

Config AIR

Digital Out 1B - SDO 16 to 23


18

Config PMSM SH 1/2

Digital Out 1B - SDO 24 to 31


19

Config Encoder Input on RS422

AOMR/ Analog Out 2B -  0 to 7


20


Analog Out 2B -  8 to 15


21

Config Encoder Input on Digital In 1A



22

Config Encoder Output on RS422



23

Lookup Table Config

eHS PWM 1 -  0 to 7


24


eHS PWM 2 -  8 to 15


25




26




27


eHS SWG


28


PMSM SH 1/2


29


30


Encoder Output on RS422


31
LEDs
32
Lookup Table Config

System Overview


Extensive I/O compatibility (Polymorphism)

Listed cards are compatible at the same location


Analog In Mezzanine

Compatible Mezzanine Modules

OP5340-1 16 Ain

OP5340-2 16 Ain 


Analog Out Mezzanine

Compatible Mezzanine Modules

OP5330-3 16 Aout

OP5330-1 16 Aout

Expansion Mezzanine

Compatible Mezzanine Modules

OP5969-1 DIN/DOUT RS422 5V

OP5969-2 DIN/DOUT FIBER OPTIC



Permanent Magnet Synchronous Machine Spatial Harmonics model (PMSM SH)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

A total of two PMSMSH motors are available and configured using the Permanent Magent Synchronous Machine in the Schematic Editor library.

 Schematic Editor Workflow - PMSM (SH) block


Communication port configuration for the Dual PMSM (SH) block

      

Dual PMSM Motors SH

Machine Label

PMSM 1

PMSM 2

Data In Port Number

28

Load In Port Number

18

Data Out Port Number

9

Connectivity (Input)

The signals received could be used as external carrier for machine resolver module. 
Analog In - Slot 2A - Ch00-01

Encoder Output

Encoder outputs are sent to 
Digital Out - Slot 1B/ Slot 3B - RS422


Encoder 1

Encoder 2

ACh00Ch04
BCh01Ch05
ZCh02Ch06

Hardware Pin assignment


Analog Output Mapping and Rescaling module (AOMR)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

There is one AOMR block allowing to configure all 32 analog outputs.

AOMR Master Subsystem (SM) block

Communication port configuration for the Analog Output Mapping and Rescaling (AOMR) block


AOMR - Slot 2B

VerisonV2
Data In Port Number19
Load In Port Number12

AOMR Output

Lane IndexSignal SourceDetails
0eHS OutputseHS Y01-32
1PMSM SH 1/2 AnalogOutDual PMSM SH Model

Analog Input Differential Rescaling module (AIR)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

AIR block configures analog inputs for eHS.

AIR block

Communication port configuration for the Analog Input Differential Rescaling (AIR) block


AIR - Slot 2A

ChannelsCh00-15
Load In Port Number17

Analog In module (AI)

AI block reads signals from analog input channels on the simulator. 

Schematic Editor Workflow - OPAL-Board/AI

RT-LAB

HYPERSIM


Communication port configuration for the Analog Input (AI) block


Slot 2A 

ChannelsCh00-07Ch08-15
Data Out Port Number78

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment



Analog Out module (AO)

AO block configures analog output channels on the simulator. 

Schematic Editor Workflow - OPAL-Board/AO

RT-LAB

HYPERSIM


Communication port configuration for the Analog Output (AO) block


Slot 2B

ChannelsCh00-07Ch08-15
Data In Port Number1920

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment


Digital In module (DI)

DI block reads signals from digital input channels on the simulator. It could be static, TSDI or PWMIn.

Schematic Editor Workflow - OPAL-Board/DI

RT-LAB

HYPERSIM


Communication port configuration for the Digital Input (DI) block


Slot 1A 

ChannelsCh00-07Ch08-15Ch16-23Ch24-31
Data Out Port Number3456

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment



Digital Out module (DO)

DO block configures digital output channels on the simulator. It could be static, TSDO or PWMOut.

Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Digital Output (DO) block


Slot 1B 

ChannelsCh00-07Ch08-15Ch16-23Ch24-31
Data In Port Number15161718
Load In Port Number4567

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment



Encoder Input module (ENC IN)

Encoder Input block reads signals from specific input channels on the simulator.

Schematic Editor Workflow - OPAL-Board/ENC In

RT-LAB

HYPERSIM


Communication port configuration for the Encoder Intput (ENC IN) block


Slot 3A - RS422 

Nb of Encoder Signals2
Load In Port Number19
Data Out Port Number10

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment



Encoder Output module (ENC OUT)

Encoder Output block configures specific output channels on the simulator.

Schematic Editor Workflow - OPAL-Board/ENC Out

RT-LAB

HYPERSIM


Communication port configuration for the Encoder Output (ENC OUT) block


Slot 3B - RS422 

Nb of Encoder Signals2
Data In Port Number30
Load In Port Number22

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment

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