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OpAsync 1553 Error injection buffer (EI BUF)




This block is used to configure the error injection buffers of a QPCX card for an RT send action. An error injection buffer is composed of a mode input signal and a value input signal.

These input signals are vectors of the same size. The first element of these vectors correspond to the error on the status word and the next ones are for the data words.  The mode allows injecting different types of error and the value allows specifying the behavior of some errors.

Up to 63 error injection buffers can be instantiated for a sub-device. A single error injection ID can be referenced by many RT send block. 

The next section describes how to use the supported error injection modes and values.

Summary of Error Injection 

The next table shows a summary of the supported errors with the OpAsyn 1553 Error injection buffer (EI BUF) block.

Error injectionMode Value DescriptionSupported words
None0-No error.Status and data words
Parity2-To Inject a parity error on the corresponding word.
Mid sync zero crossing3-To delay the zero-crossing point of the bits in the synchronization code by 300 ns.
Mid bit zero crossing40 to 15To select at which data bits from 0 to 15 (LSB to MSB) to apply a zero-crossing delay of 300 ns.
Bit count5

14 to 19


The value corresponds to the number of data bits to be sent in a word.

Normally a word has 16 data bits, 1 bit of parity, and 3 bits of sync. 

It's recommended to use a value in the range of 14 to 19.

Some parts of the hardware may not work properly if this range is not respected.

Word count61 to 33

To specify a wrong number of words in the message. 

Only for the status word
Invert sync7-To send a word with an invalid sync code.Status and data words
Data word gap81 to 5

To configure a gap time between data word.

The gap goes from 0.5 to 2.5 microseconds with an increment of 0.5 microseconds.

Programmable response916 to 63

To set the delay between a received command word and the transmission of the RT.

The increment is 0.5 us. The acceptable value signal can go from 16 to 63.

This means a response delay from 8 us to  31.5 us.

Only for the status word
Response to a wrong address130 to 31

To force the status word to contain a wrong address.

Bi-phase error150 to 15

To select a data word bit (LSB to MSB) at which there won't be any zero-crossing during the bit period (based on Manchester II waveform). The next figure shows how the bi-phase error works.

Status and data words


Controller IDThis parameter is used to retrieve to which Op1553_AsyncCtrl block the present block is associated. This ID is a literal integer value in the range [0, 255]. An Op1553_AsyncCtrl block with the same ControllerID value must exist in the model.
Send IDThis parameter is used by the Asynchronous Process to differentiate between the OpAsync_1553_RT_Send blocks attached to the same Op1553_AsyncCtrl block.
Error injection IDThe unique error injection ID to be used for that block. There can be up to 63 error injection ID for each sub-device. During run time, the RT send blocks using error injection may refer to this block using this ID.  
Sub-device number

Some MIL-1553 boards can support more than one MIL-1553 device. Each device is then referred to as one sub-device.

This parameter is used to associate the current OpAsync_1553_RT_Send block with one sub-device of the MIL-1553 card selected in the associated Op1553_AsyncCtrl (same ControllerID value). This parameter is grayed out if the card selected in the Op1553_AsyncCtrl block holds only one sub-device.

Error injection typeOnly RT Send is supported.


Configuration triggerA scalar input, to trig the error injection buffer configuration on the hardware.
Error injection modeA vector of up to 33 elements. The first signal corresponds to the mode of the status word. The last 32 are for each data word. The supported modes are shown in the error injection summary section.
Error injection valueA vector of up to 33 elements. The first signal corresponds to the value of the status word. The last 32 are for each data word. The supported values for each mode are shown in the error injection summary section.

The width of the signal going in the error injection mode input must be the same as the signal going in the error injection value input.


  • Status 
    • -1 if a configuration error occurs. To see the log of the error, the model environment variable TRACE_1553 must be set.
    • On a configuration success, the status will be incremented.

Error Injection Types

This section has been taken from Software User's Manual BusTools/1553-API Publication No. 1500-045 Rev. 5.12. Refer to the section error injection summary to have more details about how to inject specific errors with the OpAsync 1553 Error injection buffer block.

Bit Count ErrorThe hardware transmits a sync pulse, 16 data bits and a parity bit for each 1553 word. Setting this error allows you to alter the number of data bits in a word. The RT Validation Test Plan recommends using values in the range 14 to 19. Values outside of this range may cause other parts of the hardware to function improperly. Set this error for any entry in any EI buffer type. In Bit Count errors, the parity bit counts as a bit. Thus, injecting 17 bits may produce a parity error, not a bit count error.
Word Count ErrorNormally, the command word specifies the number of words in a message. This error causes the actual number of words in the message to differ from that in the command word. You can set any word count from one to 33. [...]
Sync ErrorUse this error to transmit a word with an invalid sync code. The data pattern specified in the error injection buffer indicates the shape of the sync code. A data pattern of zero (0) defaults to "inverted sync". This error can be specified for any entry in any EI buffer type.
Mid-Bit Mid-Parity and Mid-SyncThese three error injection codes delay the zero-crossing point by 300ns from where it is expected. For mid-bit zero-crossing errors, you can select the bit (0 through 15). Bit 0 is the LSB of the 16bit word, however, it transmits last in the serial stream. Similarly, bit 15, the MSB, is transmitted first.
Programmable ResponseThis RT selection allows the application to enter a programmable response time of up to 31½µs, programmed with the LSB equal to 500ns. Do not use an entry less than 4-µs as this is not supported and undefined operation may result. An entry greater than 14µs is a late response according to the MIL-STD-1553B Specification. This error applies only to the RT status word in either of the RT buffers.
Parity ErrorThis error transmits a word with an inverted parity bit. You can specify this for any entry in any EI buffer type.
Data gapAdd a gap time between data words from 0.5 to 2.5µs in .5-µs increments.
Respond with Wrong AddressNormally, the RT status word contains the address of the RT. This error forces the status word to contain a different address. You can set the address to any number from 0 to 31. You can select this error only in RT Receive and RT Transmit Error Injection Buffer types.
Bi-Phase ErrorA bi-phase bit error is an error where there is no zero crossing for the entire bit time. It is not predictable how a 1553 decoder will interpret a word when this error is on one of the first two bits. This depends on timing and the states of the first two bits. When the bit does not cross zero, it may stay in one state for 1½µs and the decoder might try to reestablish sync. Therefore, the API does not support injection in either of the first two bits, but you should be aware of the possible behavior should this case occur.

Characteristics and Limitations

Error injection buffer is only supported to be used with the RT Send block and QPCX cards.

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