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V2.11 Virtex-7 VC707 - eHS x128 - PMSM - IM - IO Config1

Owned by Sylvain Ménard
Last updated: Apr 04, 2023
4 min read

OPAL-RT TECHNOLOGIES
1751 Richardson suite 1060, Montréal QC Canada H3K 1G6
www.opal-rt.com

© 2023 OPAL-RT TECHNOLOGIES All rights reserved

Legend

SPS WORKFLOW SCHEMATIC EDITOR WORKFLOW

Introduction

This firmware includes:

  • One eHS x128 Gen4 Solver

  • Two Dual Permanent Magnet Synchronous Machines (PMSM-VDQ) models

  • One Quad Generic Machines model

  • One Analog Output Mapping and Rescaling (AOMR) module

  • One Analog Input Differential Rescaling (AIR) module

  • One Thermal Losses (TL) module

  • One Saturable Transformer (satXFO) module


LoadIn/DataIn/DataOut mapping


LoadIn

DataIn

DataOut

1

Config eHS

Inputs eHS

eHS Averaged

2

Scenario / Rst eHS = Status

TSDO 1 - eHS 0 to 7

eHS DownSample

3


TSDO 2 - eHS 8 to 15

Digital In 2A - 0 to 7

4

PWM 2B -  0 to 7

TSDO 3 - eHS 16 to 23

Digital In 2A - 8 to 15

5

PWM 2B -  8 to 15

TSDO 4 - eHS 24 to 31

Digital In 2A - 16 to 23

6

PWM 2B -  16 to 23

TSDO 5 - eHS 32 to 39

Digital In 2A - 24 to 31

7

PWM 2B -  24 to 31

TSDO 6 - eHS 40 to 47

Digital In 4A - 0 to 7

8

PWM 4B -  0 to 7

TSDO 7 - eHS 48 to 55

Digital In 4A - 8 to 15

9

PWM 4B -  8 to 15

TSDO 8 - eHS 56 to 63

Digital In 4A - 16 to 23

10

PWM 4B -  16 to 23

TSDO 9 - eHS 64 to 71

Digital In 4A - 24 to 31

11

PWM 4B -  24 to 31

Digital Out 2B - SDO 0 to 7

Analog In 1B - 0 to 7

12

Config AOMR

Digital Out 2B - SDO 8 to 15

Analog In 1B - 8 to 15

13

eHS PWM 1 - eHS 0 to 7

Digital Out 2B - SDO 16 to 23

PMSM VDQ 1/2

14

eHS PWM 2 - eHS 8 to 15

Digital Out 2B - SDO 24 to 31

PMSM VDQ 3/4

15

eHS PWM 3 - eHS 16 to 23

Digital Out 4B - SDO 0 to 7

Quad Generic Machine

16

eHS PWM 4 - eHS 24 to 31

Digital Out 4B - SDO 8 to 15

Thermal Losses

17

Config AIR

Digital Out 4B - SDO 16 to 23


18

Config PMSM VDQ 1/2

Digital Out 4B - SDO 24 to 31


19

Config PMSM VDQ 3/4

AOMR/Analog Out 1A -  0 to 7


20

Config Quad Generic Machine

Analog Out 1A -  8 to 15


21

Config Thermal Losses

Analog Out 3B -  0 to 7


22


Analog Out 3B -  8 to 15


23

SFP

eHS PWM 1 -  0 to 7


24

Lookup Table Config

eHS PWM 2 -  8 to 15


25


eHS PWM 3 -  16 to 23


26


eHS PWM 4 -  24 to 31


27


eHS SWG


28


PMSM VDQ 1/2


29


PMSM VDQ 3/4


30


Quad Generic Machine


31


Analog Out 3A -  0 to 7


32


Analog Out 3A -  8 to 15


33


Thermal Losses


34


TSDO 10 - eHS 72 to 79


35


TSDO 11 - eHS 80 to 87


36


TSDO 12 - eHS 88 to 95


37


TSDO 13 - eHS 96 to 103


38


TSDO 14 - eHS 104 to 111


39


TSDO 15 - eHS 112 to 119


40


TSDO 16 - eHS 120 to 127


41


TSDO 17 - eHS 128 to 135


42


TSDO 18 - eHS 136 to 143


43


SFP


System Overview

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Extensive I/O compatibility (Polymorphism)

Listed cards are compatible at the same location (More details)


Digital In Mezzanine

Compatible Mezzanine Modules

OP5353 32 Din

OP5351 32 Din TTL

OP5357 32 Din LVDS

OP5358-3 32 Din RS-422

OP5358-5 32 Din RS-422


Digital Out Mezzanine

Compatible Mezzanine Modules

OP5360-1 32 Dout

OP5360-2 32 Dout

OP5360-3 32 Dout

OP5352 32 Dout TTL

OP5359 32 Dout

OP5354 32 Dout

OP5355 32 Dout LVDS

OP5356-3 32 Dout RS422

OP5356-5 32 Dout RS422


Analog In Mezzanine

Compatible Mezzanine Modules

OP5340-1 16 Ain

OP5340-2 16 Ain 


Analog Out Mezzanine

Compatible Mezzanine Modules

OP5330-3 16 Aout

OP5330-1 16 Aout



eHS solver

SPS WORKFLOW SPECIFIC

Connectivity

SPS WORKFLOW SPECIFIC

Source Type

Source Index

Source Name

Details

Input

0

CPU Input


1

eHS Analog In

Slot 1B - Ch00-15

2

PMSM VDQ 1/2

PMSM1 Ia/PMSM1 Ib

PMSM2 Ia/PMSM2 Ib

3

Sine Wave Generator


4

PMSM VDQ 3/4

PMSM3 Ia/PMSM3 Ib

PMSM4 Ia/PMSM4 Ib

5

Quad Generic Machine

IM1 Stator Ia/IM1 Stator Ib/IM1 Rotor Ia/IM1 Rotor Ib

IM2 Stator Ia/IM2 Stator Ib/IM2 Rotor Ia/IM2 Rotor Ib

IM3 Stator Ia/IM3 Stator Ib/IM3 Rotor Ia/IM3 Rotor Ib

IM4 Stator Ia/IM4 Stator Ib/IM4 Rotor Ia/IM4 Rotor Ib

6

Data Stream from SFP #00


Gate

0

CPU Gating Signal


1

PWM


2

Digital Input

Slot 2A - Ch00-31/Slot 4A - Ch00-31

SPS WORKFLOW SPECIFIC

To contextualize the Input and Gate Configuration table with this firmware configuration, the eHS firmware config tab must be configured with the following custom input source enumeration:

{'CPU Model',0,128;'Analog In',1,16;'Sine Wave Generator',3,32;'PMSM1',2,4;'PMSM2',4,4;'GM',5,16}

And this custom gate sources enumeration:

{'CPU Model',0,72;'Digital Inputs',2,64;'PWM',1,32}

Permanent Magnet Synchronous Machine models (PMSM VDQ)

A total of two PMSM motors are available and configured using the Permanent Magent Synchronous Machine. The machine type could be Constant DQ, Variable DQ or BLDC. 

SPS Workflow - PMSM (VDQ - BLDC) block


Schematic Editor Workflow - PMSM (VDQ - BLDC) block

Communication port configuration for the Dual PMSM (VDQ) block

      

Dual PMSM Motors VDQ 1

Machine Label

PMSM 1

PMSM 2

Data In Port Number

28

Load In Port Number

18

Data Out Port Number

13


      

Dual PMSM Motors VDQ 2

Machine Label

PMSM 3

PMSM 4

Data In Port Number

29

Load In Port Number

19

Data Out Port Number

14

Connectivity (Input)

The signals received could be used as external carrier for machine resolver module. 
Analog In - Slot 1B - Ch00-15

Encoder output

Encoder outputs are sent to 
Digital Out - Slot 2B



Encoder 1

Encoder 2

Encoder 3

Encoder 4

A

Ch00

Ch04

Ch08

Ch12

B

Ch01

Ch05

Ch09

Ch13

Z

Ch02

Ch06

Ch10

Ch14

Quad Generic Machine model (GM)

A total of four Induction Machines (IM) are available and configured using Generic Machine block in the eFPGAsim library.

SPS Workflow - Generic Machine block

Schematic Editor Workflow - Generic Machine block

Communication port configuration for the Quad Generic Machine (GM) block

      

Quad Generic Machine

Machine Label

IM 1

IM 2

IM 3

IM 4

Data In Port Number

29

Load In Port Number

20

Data Out Port Number

14

Connectivity (Input)

The signals received could be used as external carrier for machine resolver module. 
Analog In - Slot 1B - Ch00-15

Encoder output

Encoder outputs are sent to 
Digital Out - Slot 2B



Encoder 1

Encoder 2

Encoder 3

Encoder 4

A

Ch16

Ch20

Ch24

Ch28

B

Ch17

Ch21

Ch25

Ch29

Z

Ch18

Ch22

Ch26

Ch30

Thermal Losses module (TL)

SPS WORKFLOW SPECIFIC

There is one Thermal Losses tab in the eHS CPU block allowing to configure all four thermal models.

SPS Workflow - Thermal Losses (TL) block

Communication port configuration for the Thermal Losses (TL) block


Thermal Losses

Data In Port Number

33

Load In Port Number

21

Data Out Port Number

16

Analog Output Mapping and Rescaling module (AOMR)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

There is one AOMR block allowing to configure all 32 analog outputs.

AOMR Master Subsystem (SM) block

Communication port configuration for the Analog Output Mapping and Rescaling (AOMR) block


AOMR - Slot 1A/3B

AOMR - Slot 3A

Version

V2

Data In Port Number

19

31

Load In Port Number

12

22

AOMR Output

Lane Index

Signal Source

Details

0

eHS Outputs

eHS Y01-128

1

PMSM VDQ 1/2 AnalogOut


/wiki/spaces/EFS/pages/22516273

2

PMSM VDQ 3/4 AnalogOut

3

Quad Generic Machine AnalogOut

/wiki/spaces/EFS/pages/22516340

4

Data Stream from SFP #01


Analog Input Differential Rescaling module (AIR)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

AIR block configures analog inputs for eHS.

AIR block

Communication port configuration for the Analog Input Differential Rescaling (AIR) block


AIR -Slot 1B

Channels

Ch00-15

Load In Port Number

17

SFP Mapping and Communication Block

A total of 32 inputs and 32 outputs are available and configured using the SFP mapping and communication block.

Schematic Editor Workflow - SFP Mapping and Communication block


Communication port configuration for the SFP mapping and communication block


SFP - Channel 0

Data In Port Number

43

Load In Port Number

23

Analog In module (AI)

AI block reads signals from analog input channels on the simulator. 

SPS Workflow - AI block



Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Analog Input (AI) block


Slot 1B 

Channels

Ch00-07

Ch08-15

Data Out Port Number

11

12

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment

Analog Out module (AO)

AO block configures analog output channels on the simulator. 

SPS Workflow - AO block


Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Analog Output (AO) block


Slot 1A 

Slot 3B

Slot  3A

Channels

Ch00-07

Ch08-15

Ch00-07

Ch08-15

Ch00-07

Ch08-15

Data In Port Number

19

20

21

22

31

32

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment

Digital In module (DI)

DI block reads signals from digital input channels on the simulator. It could be static, TSDI or PWMIn.

SPS Workflow - DI block

Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Digital Input (DI) block


Slot 2A 

Slot 4A 

Channels

Ch00-07

Ch08-15

Ch16-23

Ch24-31

Ch00-07

Ch08-15

Ch16-23

Ch24-31

Data Out Port Number

3

4

5

6

7

8

9

10

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment

Digital Out module (DO)

DO block configures digital output channels on the simulator. It could be static, TSDO or PWMOut.

SPS Workflow - DO block

Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Digital Output (DO) block


Slot 2B 

Slot 4B 

Channels

Ch00-07

Ch08-15

Ch16-23

Ch24-31

Ch00-07

Ch08-15

Ch16-23

Ch24-31

Data In Port Number

11

12

13

14

15

16

17

18

Load In Port Number

4

5

6

7

8

9

10

11

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment

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