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V2.17 Virtex-7 VC707 - eHS x128 - PMSM SH - IO Config1
OPAL-RT TECHNOLOGIES
1751 Richardson suite 1060, Montréal QC Canada H3K 1G6
www.opal-rt.com
© 2023 OPAL-RT TECHNOLOGIES All rights reserved
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SPS WORKFLOWSCHEMATIC EDITOR WORKFLOWSCHEMATIC EDITOR WORKFLOW WITH SFUNCTION
Introduction
This firmware includes:
- One eHS x128 Gen4 Solver
- Two Dual Permanent Magnet Synchronous Machines (PMSM-SH) models
- One Analog Output Mapping and Rescaling (AOMR) module
- One Analog Input Differential Rescaling (AIR) module
- One Thermal Losses (TL) module
LoadIn/DataIn/DataOut mapping
LoadIn | DataIn | DataOut | |
1 | Config eHS | Inputs eHS | eHS Averaged |
2 | Scenario / Rst eHS = Status | TSDO 1 - eHS 0 to 7 | eHS DownSample |
3 | TSDO 2 - eHS 8 to 15 | Digital In 2A - 0 to 7 | |
4 | PWM 2B - 0 to 7 | TSDO 3 - eHS 16 to 23 | Digital In 2A - 8 to 15 |
5 | PWM 2B - 8 to 15 | TSDO 4 - eHS 24 to 31 | Digital In 2A - 16 to 23 |
6 | PWM 2B - 16 to 23 | TSDO 5 - eHS 32 to 39 | Digital In 2A - 24 to 31 |
7 | PWM 2B - 24 to 31 | TSDO 6 - eHS 40 to 47 | Digital In 4A - 0 to 7 |
8 | PWM 4B - 0 to 7 | TSDO 7 - eHS 48 to 55 | Digital In 4A - 8 to 15 |
9 | PWM 4B - 8 to 15 | TSDO 8 - eHS 56 to 63 | Digital In 4A - 16 to 23 |
10 | PWM 4B - 16 to 23 | TSDO 9 - eHS 64 to 71 | Digital In 4A - 24 to 31 |
11 | PWM 4B - 24 to 31 | Digital Out 2B - SDO 0 to 7 | Analog In 1B - 0 to 7 |
12 | Config AOMR | Digital Out 2B - SDO 8 to 15 | Analog In 1B - 8 to 15 |
13 | eHS PWM 1 - eHS 0 to 7 | Digital Out 2B - SDO 16 to 23 | PMSM SH 1/2 |
14 | eHS PWM 2 - eHS 8 to 15 | Digital Out 2B - SDO 24 to 31 | PMSM SH 3/4 |
15 | eHS PWM 3 - eHS 16 to 23 | Digital Out 4B - SDO 0 to 7 | RMS and Power calculation |
16 | eHS PWM 4 - eHS 24 to 31 | Digital Out 4B - SDO 8 to 15 | |
17 | Digital Out 4B - SDO 16 to 23 | ||
18 | Config AIR | Digital Out 4B - SDO 24 to 31 | |
19 | Config PMSM SH 1/2 | AOMR/Analog Out 1A - 0 to 7 | |
20 | Config PMSM SH 3/4 | Analog Out 1A - 8 to 15 | |
21 | Analog Out 3B - 0 to 7 | ||
22 | Analog Out 3B - 8 to 15 | ||
23 | SFP | eHS PWM 1 - 0 to 7 | |
24 | Lookup Table Config | eHS PWM 2 - 8 to 15 | |
25 | RMS and Power calculation | eHS PWM 3 - 16 to 23 | |
26 | eHS PWM 4 - 24 to 31 | ||
27 | eHS SWG | ||
28 | PMSM SH 1/2 | ||
29 | PMSM SH 3/4 | ||
30 | Analog Out 3A - 0 to 7 | ||
31 | Analog Out 3A - 8 to 15 | ||
32 | TSDO 10 - eHS 72 to 79 | ||
33 | TSDO 11 - eHS 80 to 87 | ||
34 | TSDO 12 - eHS 88 to 95 | ||
35 | TSDO 13 - eHS 96 to 103 | ||
36 | TSDO 14 - eHS 104 to 111 | ||
37 | TSDO 15 - eHS 112 to 119 | ||
38 | TSDO 16 - eHS 120 to 127 | ||
39 | TSDO 17 - eHS 128 to 135 | ||
40 | TSDO 18 - eHS 136 to 143 | ||
41 | |||
42 | SFP | ||
43 | Lookup Table Config |
System Overview
Extensive I/O compatibility (Polymorphism)
Listed cards are compatible at the same location (More details)
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Permanent Magnet Synchronous Machine Spatial Harmonics model (PMSM SH)
AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW
A total of two PMSMSH motors are available and configured using the Permanent Magent Synchronous Machine in the Schematic Editor library.
Schematic Editor Workflow - PMSM (SH) block
Communication port configuration for the Dual PMSM (SH) block
| Dual PMSM Motors SH 1 | |
Machine Label | PMSM 1 | PMSM 2 |
Data In Port Number | 28 | |
Load In Port Number | 19 | |
Data Out Port Number | 13 |
| Dual PMSM Motors SH 2 | |
Machine Label | PMSM 3 | PMSM 4 |
Data In Port Number | 29 | |
Load In Port Number | 20 | |
Data Out Port Number | 14 |
Connectivity (Input)
Analog In - Slot 1B - Ch00-15
Encoder output
Digital Out - Slot 2B
Encoder 1 | Encoder 2 | Encoder 3 | Encoder 4 | |
---|---|---|---|---|
A | Ch00 | Ch04 | Ch08 | Ch12 |
B | Ch01 | Ch05 | Ch09 | Ch13 |
Z | Ch02 | Ch06 | Ch10 | Ch14 |
Power calculation module
SPS WORKFLOW SPECIFIC SCHEMATIC EDITOR WORKFLOW WITH SFUNCTION
RMS and power calculation for all circuit measurements is configured using the “Power Measurement Controller” block in the CPU model.
For more documentation on the block see : https://opal-rt.atlassian.net/wiki/spaces/PFPET/pages/65835684/CPU+Power+Measurement+Configuration+-+efs+Monitoring+cpuPowerBlock
Communication port configuration for the Power calculation block
RMS | |
---|---|
Load In Port Number | 25 |
Data Out Port Number | 15 |
Analog Output Mapping and Rescaling module (AOMR)
AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW
There is one AOMR block allowing to configure all 32 analog outputs.
AOMR Master Subsystem (SM) block
Communication port configuration for the Analog Output Mapping and Rescaling (AOMR) block
AOMR - Slot 1A/3B | AOMR - Slot 3A | |
---|---|---|
Version | V2 | |
Data In Port Number | 19 | 30 |
Load In Port Number | 12 | 13 |
AOMR Output
Lane Index | Signal Source | Details |
---|---|---|
0 | eHS Outputs | eHS Y01-128 |
1 | PMSM SH 1/2 AnalogOut | Dual PMSM SH Model |
2 | PMSM SH 3/4 AnalogOut | |
3 | Data Stream from SFP #01 |
Analog Input Differential Rescaling module (AIR)
AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW
AIR block configures analog inputs for eHS.
AIR block
Communication port configuration for the Analog Intput Differential Rescaling (AIR) block
AIR - Slot 1B | |
---|---|
Channels | Ch00-15 |
Load In Port Number | 18 |
SFP Mapping and Communication Block
A total of 32 inputs and 32 outputs are available and configured using the SFP mapping and communication block.
Schematic Editor Workflow - SFP Mapping and Communication block
Communication port configuration for the SFP mapping and communication block
SFP - Channel 0 | |
---|---|
Data In Port Number | 42 |
Load In Port Number | 23 |
Analog In module (AI)
AI block reads signals from analog input channels on the simulator.
Schematic Editor Workflow - OPAL-Board/AI
RT-LAB
HYPERSIM
Communication port configuration for the Analog Input (AI) block
Slot 1B | ||
---|---|---|
Channels | Ch00-07 | Ch08-15 |
Data Out Port Number | 11 | 12 |
Connector Pin Assignment
Please refer to your hardware documentation
Analog Out module (AO)
AO block configures analog output channels on the simulator.
Schematic Editor Workflow - OPAL-Board/AO
RT-LAB
HYPERSIM
Communication port configuration for the Analog Output (AO) block
Slot 1A | Slot 3B | Slot 3A | ||||
---|---|---|---|---|---|---|
Channels | Ch00-07 | Ch08-15 | Ch00-07 | Ch08-15 | Ch00-07 | Ch08-15 |
Data In Port Number | 19 | 20 | 21 | 22 | 31 | 32 |
Connector Pin Assignment
Please refer to your hardware documentation
Digital In module (DI)
DI block reads signals from digital input channels on the simulator. It could be static, TSDI or PWMIn.
Schematic Editor Workflow - OPAL-Board/DI
RT-LAB
HYPERSIM
Communication port configuration for theDigital Input (DI) block
Slot 2A | Slot 4A | |||||||
---|---|---|---|---|---|---|---|---|
Channels | Ch00-07 | Ch08-15 | Ch16-23 | Ch24-31 | Ch00-07 | Ch08-15 | Ch16-23 | Ch24-31 |
Data Out Port Number | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
Connector Pin Assignment
Please refer to your hardware documentation
Digital Out module (DO)
DO block configures digital output channels on the simulator. It could be static, TSDO or PWMOut.
Schematic Editor Workflow - OPAL-Board/DO
RT-LAB
HYPERSIM
Communication port configuration for theDigital Output (DO) block
Slot 2B | Slot 4B | |||||||
---|---|---|---|---|---|---|---|---|
Channels | Ch00-07 | Ch08-15 | Ch16-23 | Ch24-31 | Ch00-07 | Ch08-15 | Ch16-23 | Ch24-31 |
Data In Port Number | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 |
Load In Port Number | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 |
Connector Pin Assignment
Please refer to your hardware documentation
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